Switch Chip Clock Selection for CXL and PCIe Device Recognition

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Solution Overview

Problem

Existing clock control methods for switch chips in CXL and PCIe environments are inefficient, leading to poor clock adaptation efficiency and device recognition issues due to manual selection of clock modes and potential quality issues in homologous clock signals.

Innovation Solution

A clock control device with a clock controller and selector that automatically identifies the target device type and selects the appropriate clock signal from multiple generators, ensuring compatibility and quality by using a clock buffer to determine the best signal for transmission to the switch chip and target device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If manual clock mode selection is used according to plugged-in devices, then clock compatibility can be maintained, but clock adaptation efficiency becomes low and system configuration becomes complex

Engineering Contradiction:
Improveclock compatibilityVSAvoidclock adaptation efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system performs automatic clock mode selection without manual intervention. The detection module automatically detects the device type plugged into the switch chip, and the control module automatically selects the appropriate clock mode (homologous or non-homologous) based on the detected device type, enabling the system to self-configure and adapt to different devices automatically

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system dynamically changes the clock mode parameter based on the detected device type. When a CXL device is detected, the system switches to non-homologous clock mode; when a PCIe device is detected, it switches to homologous clock mode. This dynamic parameter adjustment allows the system to adapt to different device requirements automatically

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If homologous clock signals are used for PCIe devices, then clock compatibility is maintained, but device recognition fails when clock signal quality is poor due to long cable links

Engineering Contradiction:
Improveclock compatibilityVSAvoiddevice recognition reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system dynamically switches between homologous and non-homologous clock modes based on real-time detection of the plugged-in device type. This dynamic adaptation allows the system to use non-homologous clock mode for CXL devices with longer cable links, improving reliability while maintaining compatibility with both device types

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The switch chip acts as an intermediary that receives clock signals from different sources (homologous or non-homologous clock generators) and selectively outputs the appropriate clock mode to the target device. This intermediary function allows the system to bridge different clock ecosystems and adapt to various device requirements

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If the switch chip supports both CXL and PCIe device modes, then device versatility is improved, but clock mode selection complexity increases

Engineering Contradiction:
Improvedevice support capabilityVSAvoidclock mode selection complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The detection module automatically identifies the device type (CXL or PCIe) plugged into the switch chip, and the control module automatically configures the appropriate clock mode without requiring manual intervention. This self-service mechanism simplifies the overall system configuration while maintaining support for multiple device types

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The switch chip is designed with multi-functionality to support both CXL and PCIe device modes simultaneously. The clock control system is configured to handle both homologous and non-homologous clock modes through a single integrated design, eliminating the need for separate clock selection mechanisms for different device types

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12481308B2Clock control method, device for switch chip, and switch board
Publication Date: 2025.11.25 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US12481308B2 patent drawing
  • US12481308B2 patent drawing
  • US12481308B2 patent drawing

AI summary

Provided are a clock control method, device for a switch chip, and a switch board. The method is applied to a clock control device, and includes: receiving clock signals transmitted by clock generators of a plurality of clock types, the clock control device is connected to a switch chip, the switch chip uses clock signals of different clock types in response to controlling target devices of different device types, and the plurality of clock types correspond to a plurality of device types; identifying a target device type of the plurality of device types, to which a target device belongs; and transmitting, to the switch chip and the target device, a target clock signal transmitted by a target clock generator of the clock generators of the plurality of clock types, the target clock generator is a clock generator of a target clock type corresponding to the target device type.