High Frequency Switch Circuit Balanced Lines Distortion
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Solution Overview
Problem
Conventional high frequency switch circuits face challenges in achieving low distortion characteristics due to high power signals, which result in DC-like currents flowing when FETs are in an off state, deteriorating distortion performance.
Innovation Solution
A high frequency switch circuit design featuring balanced lines with quarter-wave transmission lines and controlled circuits between transmission line pairs, allowing power distribution to both sides of the balanced lines, preventing DC-like currents and improving distortion characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional unbalanced lines are used in high frequency switch circuits, then the circuit structure is simple, but DC-like currents flow during high power signal input which deteriorates distortion characteristics
Solution Approach 1:
The patent divides the single unbalanced transmission line into two separate balanced transmission lines. Each balanced line carries a portion of the signal power, which segments the power distribution and prevents excessive voltage swing on any single line. This segmentation eliminates the DC-like current flow that occurs in conventional unbalanced configurations during high power operation, thereby improving distortion characteristics while maintaining reasonable structural complexity.
2Ease of operation
If FETs are used as switches in high frequency switch circuits, then the switching function is achieved, but DC-like currents flow when FETs are in off state which worsens distortion performance
Solution Approach 1:
The patent introduces balanced transmission lines as intermediary elements between the signal source and the FET switches. These transmission lines transform the voltage distribution characteristics, ensuring that even when FETs are in the off state, the voltage swing remains within limits that prevent DC-like current flow. The intermediary transmission lines effectively decouple the switching action from the harmful current flow, allowing the FETs to perform their switching function without degrading distortion performance.
3Power
If high power signals are input to conventional switch circuits, then the power handling capability is sufficient, but DC-like currents flow which deteriorates distortion characteristics
Solution Approach 1:
The patent segments the high power signal into two separate balanced transmission lines, with each line carrying a portion of the total power. This power segmentation reduces the voltage swing on each individual line, preventing the formation of DC-like currents even when handling high power signals. The segmentation approach allows the circuit to maintain high power handling capability while avoiding the distortion degradation that would otherwise occur.
Solution Approach 2:
The patent changes the electrical parameters of the transmission system by transitioning from an unbalanced single-line configuration to a balanced two-line configuration. This parameter change fundamentally alters the voltage distribution and current flow characteristics, enabling the circuit to handle high power signals without generating DC-like currents. The parameter transformation maintains power handling capability while eliminating the source of distortion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively prevents DC-like currents from flowing during high power signal input, thereby enhancing distortion characteristics and maintaining performance in high frequency applications.
Implementation Method 1
an impedance transformation-type switch circuit is known in which each path uses a configuration in which quarter-wave transmission lines are connected in cascade
Implementation Method 2
transmission lines 4a and 4b each having a line length of a quarter of a wavelength (λ/4) are connected in series between the input terminal 1 and the transmitting side output terminal 2
Implementation Method 3
FETs 5a and 5b are connected in parallel to contact points between them... Control voltages are applied from the control terminals 6a to 6d to the gates of the FETs 5a to 5d to vary the impedance of the FETs 5a to 5d, thereby switching between paths
Data Source
AI summary
A switch circuit includes a balanced line connected between one end of an unbalanced line having another end connected to an input terminal and an output terminal and a balanced line connected between the one end of the unbalanced line and an output terminal. On each of the balanced lines, a plurality of quarter-wave transmission lines are connected in cascade, and each of a plurality of FETs, whose impedance is controllable, is connected between one pair of transmission lines constituting a balanced line for each interconnection point between the transmission lines, so that the power of a signal is distributed to both of the pair of transmission lines, and therefore the inputted power becomes half on each balanced line, thereby making it possible to prevent a DC-like current from flowing when the FET is in an off state even if a high frequency signal with high power is inputted.