Switch Control Circuit for Power Switch ESD Protection
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Solution Overview
Problem
Microcontroller power switches face challenges in minimizing off-state leakage and protecting against Electrostatic Discharge (ESD) events, as they are controlled by a separate voltage domain that becomes unpowered during ESD events, leading to unintended activation and potential damage to core circuitry.
Innovation Solution
A switch control circuit that includes a driver circuit, a pass gate, a pull-up transistor, and a bias circuit, which actively turns off the power switch during ESD events by using a pull-up transistor tied to the higher VDD_CTL voltage and isolating the power switch from the driver circuit via a pass gate, ensuring the power switch is turned off even when VDD exceeds VDD_CTL.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power switch is controlled by a separate voltage domain (VDD_CTL) that is unpowered during ESD events, then the power switch can be turned off to minimize leakage during normal operation, but the power switch turns on during ESD events exposing core circuitry to damage
Solution Approach 1:
A pull-up transistor is introduced as an intermediary component between the power switch and the unpowered VDD_CTL domain. This pull-up transistor is controlled by a powered voltage domain and actively pulls the gate of the power switch to a high voltage level during ESD events, ensuring the power switch remains off and blocks ESD current from reaching core circuitry, thus resolving the contradiction between leakage minimization and ESD protection
2Loss of energy
If the power switch uses a thicker gate oxide and separate voltage domain control, then the power switch can operate in deep-subthreshold mode with minimal leakage, but the control circuit becomes more complex and requires additional voltage domains
Solution Approach 1:
The control circuit is designed to serve multiple functions: during normal operation it controls the power switch for leakage minimization, and during ESD events it automatically activates the pull-up transistor to protect core circuitry. This multi-functionality reduces the need for separate ESD protection circuits, thereby managing complexity while achieving both leakage reduction and ESD protection
Data Source
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AI summary
An integrated circuit includes a power switch coupled between a first voltage supply node and an internal voltage supply node and a switch control circuit coupled to a control electrode of the power switch. The switch control circuit includes a driver circuit coupled between a second voltage supply node and a third voltage supply node, a pass-gate having a first node coupled to an output of the driver circuit and a second node coupled to the control electrode of the power switch, a pull-up transistor having a first current electrode coupled to the first voltage supply node, a second current electrode coupled to the control electrode of the power switch, and a bias circuit having a bias output configured to provide a higher voltage between the first and second power supply nodes as a bias voltage to a body electrode of the pull-up transistor.