Switch Controller On-Time Delay Compensation

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Solution Overview

Problem

Conventional switching power converters face significant on-time delays due to propagation delays through the buffer and turn-on/turn-off delays in the switching device, leading to output voltage ripple, which existing solutions fail to adequately address.

Innovation Solution

A switch controller adjusts the intended on-time of the switching transistor in subsequent cycles based on the time difference between actual and intended on-times in previous cycles, compensating for total delays, including propagation, turn-on, and turn-off delays, using a comparator and delay compensation circuitry to calculate and apply this adjustment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional switching devices and buffers are used, then the power converter can operate with standard components, but propagation delay and turn-on/turn-off delays cause significant on-time errors and output voltage ripple

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidswitching delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by measuring the actual on-time of the switching device in each cycle and using this measurement to adjust the intended on-time in the next cycle. The delay compensation circuitry proactively calculates the time difference and modifies the pulse width before the next switching cycle begins, thereby compensating for delays before they affect output voltage regulation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously measuring the actual on-time of the switching device and comparing it with the intended on-time. The delay compensation circuitry uses this feedback information (the time difference) to adjust the intended on-time for subsequent cycles, creating a closed-loop control system that reduces output voltage ripple caused by switching delays.

Inventive Principle:
Principle #23Feedback

2Speed

If the buffer propagation delay and switch turn-on/turn-off delays are reduced through component selection, then switching speed improves, but component cost and complexity increase

Engineering Contradiction:
Improveswitching speedVSAvoidcontrol circuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies self-service by using the switching device's own actual on-time measurement to generate the compensation signal. The delay compensation circuitry automatically calculates the time difference between actual and intended on-times and uses this to adjust subsequent intended on-times, enabling the system to self-correct for delays without requiring complex external compensation circuits or additional active components.

Inventive Principle:
Principle #25Self-service

3Reliability

If the on-time of the switching transistor is extended to compensate for delays, then output voltage regulation improves, but the switching device operates longer causing increased power loss and heat generation

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidswitching power loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by making the intended on-time adjustable and adaptive rather than fixed. The delay compensation circuitry dynamically modifies the intended on-time based on the measured time difference from previous cycles, allowing the system to optimize the switching duration for each cycle to achieve accurate voltage regulation while minimizing unnecessary power loss.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7876582B2Compensating on-time delay of switching transistor in switching power converters
Publication Date: 2011.01.25 DIALOG SEMICONDUCTOR INC
  • US7876582B2 patent drawing
  • US7876582B2 patent drawing
  • US7876582B2 patent drawing

AI summary

A switch controller compensates the total on-time delay of the switch in a switching power converter. The intended on-time of the switching transistor for the present switching cycle is reduced by the time difference between the actual on-time and the intended on-time of the switching transistor in the previous switching cycle in the switching power converter. The total delay of the switch in the switching power converter, including propagation delay, switch turn-on delay, and switch turn-off delay, can be compensated in real time, cycle by cycle.