Switch Reduction Control Using CSN Windows and Partial Aggregation
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Solution Overview
Problem
Current in-network computing solutions for reduction operations by switches suffer from latency variance, deadlock issues, and transport awareness, leading to inefficient bandwidth usage and computational load, particularly in networked systems with multiple communication groups.
Innovation Solution
Implementing a collective sequence number (CSN) window to manage collective reduction operations, allowing switches to send partially aggregated packets when buffer space is limited, and using acknowledgement mechanisms to avoid deadlocks and optimize data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switches perform reduction operations by aggregating packets from multiple workers, then bandwidth requirements and computational load are reduced, but latency variance and deadlock issues occur
Solution Approach 1:
The patent applies preliminary action by pre-allocating buffers for reduction operations before packets arrive. The switch controller determines buffer requirements in advance and configures the switching fabric accordingly, ensuring that buffers are ready to receive and aggregate packets without causing latency variance or deadlocks. This proactive buffer management resolves the contradiction by preparing the system ahead of time rather than reacting to packet arrivals.
2Productivity
If switches allocate buffers for reduction operations, then packet aggregation efficiency is improved, but buffer shortage occurs when multiple communication groups contend for limited buffer space
Solution Approach 1:
The patent implements dynamics by making buffer allocation adaptive rather than static. The switch controller dynamically determines buffer allocation based on current network conditions, communication group priorities, and packet arrival patterns. This dynamic buffer management allows the system to optimize reduction operation efficiency while adapting to varying demands from multiple communication groups, preventing buffer shortages during contention scenarios.
3Measurement precision
If switches wait for all packets to arrive before forwarding aggregated results, then complete reduction accuracy is achieved, but transmission delay increases
Solution Approach 1:
The patent applies partial action by allowing the switch to forward aggregated reduction results before all packets from every worker have arrived. The switch controller determines when sufficient packets have been received to produce a useful partial aggregation, and forwards this intermediate result immediately. This approach sacrifices complete reduction accuracy in favor of significantly reduced transmission delay, enabling faster convergence in iterative algorithms while still providing meaningful computational progress.
Data Source
AI summary
A switch can perform reduction operation in a network of compute blocks. The switch receives data packets from some compute blocks and stores the data packets in one or more buffers. In response to receiving by the switch a new data packet, the switch determines whether the buffers have sufficient storage to store another data packet. In embodiments where the buffer does not have sufficient storage, the switch aggregates the data packets in the one or more buffers to form a partially aggregated data packet and transmit the partially aggregated data packet to the next hop. In embodiments where the buffer has sufficient storage to store another data packet, the switch stores the new data packet in the one or more buffers and may aggregate all the data packets to form a fully aggregated data packet. The switch may use a CSN window to control the reduction operation.