Switch Control Module Using Dead Time to Prevent Cross-Conduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing electronic circuits, particularly DC-DC converters, face the issue of cross-conduction where both switches are inadvertently turned on, creating an unwanted path between the power supply and ground, leading to potential damage and operational inefficiencies.

Innovation Solution

A control module with a logic control stage, event detector, pulse generator, memory stage, and synchronization stage generates delayed control signals to ensure the top transistor is only on when the bottom transistor is off, using asynchronous edges and dead time pulses to prevent cross-conduction without requiring high-frequency timing signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-frequency timing signals are used to control switch turn-on/off, then cross-conduction can be prevented, but power consumption increases and response time is extended

Engineering Contradiction:
Improvecross-conduction preventionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The control module generates dead time pulses in advance of the actual switch switching events. These pre-generated pulses are stored in a buffer and released at the appropriate moments to control the switches, eliminating the need for continuous high-frequency timing signals and reducing power consumption while maintaining reliable cross-conduction prevention

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses the asynchronous edges from the original control signals to automatically trigger the dead time pulse generation. The event detector stage captures these edges and uses them to initiate the dead time sequencing, making the system self-regulating without requiring external high-frequency clock signals

Inventive Principle:
Principle #25Self-service

2Reliability

If high-frequency timing signals are used to control switch turn-on/off, then cross-conduction can be prevented, but response time increases

Engineering Contradiction:
Improvecross-conduction preventionVSAvoidresponse time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Dead time pulses are pre-generated and buffered before being applied to the switches. This preliminary preparation allows the switches to be controlled with minimal delay, as the control signals are already ready when needed, significantly reducing response time compared to generating timing signals in real-time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system skips the time-consuming process of generating high-frequency timing signals by using asynchronous edges to directly trigger dead time pulse generation. This approach rushes through the critical path by eliminating unnecessary intermediate steps, achieving faster response times

Inventive Principle:
Principle #21Skipping (Rushing through)

3Use of energy by moving object

If asynchronous edges and dead time pulses are used for switch control, then power consumption is reduced, but control complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcontrol circuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The control function is segmented into distinct stages: an event detector stage that captures asynchronous edges, a dead time pulse generator that creates control signals, and a buffer stage that stores and releases pulses. This segmentation allows each stage to perform a specific function efficiently, reducing overall power consumption while managing complexity through functional decomposition

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buffer stage is introduced as an intermediary between the dead time pulse generator and the switch control inputs. This buffer acts as a mediator that stores pulses and releases them at appropriate times, simplifying the control logic while maintaining low power consumption by avoiding continuous signal generation

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of operation

If both switches are controlled to be on simultaneously, then circuit operation is simplified, but cross-conduction occurs causing damage and inefficiency

Engineering Contradiction:
Improveswitch control simplicityVSAvoidcircuit safety
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The control module applies preliminary anti-action by generating dead time pulses that ensure one switch is turned off before the other is turned on. This pre-emptive control prevents the harmful cross-conduction condition from occurring in the first place, protecting the circuit while maintaining operational simplicity

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The system converts the potential harm of simultaneous switch activation into a benefit by using the asynchronous edges from the control signals themselves to trigger the dead time sequencing. The very signals that could cause cross-conduction are repurposed to prevent it, improving reliability without complicating the control logic

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentEP4340199A1Control module with protection against cross-conduction for an electronic circuit including at least a pair of switches and related control method
Publication Date: 2024.03.20 STMICROELECTRONICS SRL
  • EP4340199A1 patent drawingFigure 1
  • EP4340199A1 patent drawingFigure 2
  • EP4340199A1 patent drawingFigure 3

AI summary

Control module for an electronic circuit (2,4,16,18;DH1,DL1,GH1,GL1) which includes at least a first and a second switch (2,4;GH1,GL1), including: an event detector stage (130), which receives logic electrical signals (PWM,DCM,OV,REG_MOD;sROT,sSENSE); a pulse generator circuit (132), which is coupled to the event detector stage and generates a dead time signal (sPULSE) as a function of edges of the logic electrical signals detected by the event detector stage, the dead time signal including pulses delimited, each, by an edge of a first type and by a subsequent edge of a second type; a combinatorial sampling stage (134,186,189; 134,237), which generates, on the basis of a truth table and the logic electrical signals, at least a first and a second sampled preliminary signal (CMD_HS_sam, CMD_LS_sam), whose values are updated at each edge of the first type of the dead time signal; and an update stage (188,190;238), which, at each pulse of the dead time signal, updates the values of the first and the second control signals as a function of the first and the second sampled preliminary signals, subsequently to the edge of the first type or subsequently to the edge of the second type of the pulse of the dead time signal. Figure 3