High-Voltage Switch Driving Circuit With Latch-Controlled Fast Turn-Off
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Solution Overview
Problem
High voltage switch configurations face challenges in achieving quick switch transients with reasonable control current values, as existing designs result in long turn-off times due to the sizing of resistive elements and parasitic capacitances.
Innovation Solution
A latch circuit is introduced between the gate and source terminals of the switch, utilizing latch transistors and clamp circuits with Zener diodes and capacitors to manage current values and ensure correct switching states, allowing for quick turn-on and turn-off operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistive element is used to connect gate and source terminals of the switch, then the switch can be turned off, but the turn-off time becomes long due to the time constant formed by the resistance and parasitic capacitances
Solution Approach 1:
The patent applies dynamics by making the resistance value variable rather than fixed. The switch resistance is dynamically adjusted to be low during turn-on (enabling fast charging of gate capacitance) and high during turn-off (enabling fast discharge of gate capacitance). This is achieved through a control circuit that modifies the resistance characteristic of the switch based on the operating state, resolving the contradiction between fast turn-on and fast turn-off requirements.
Solution Approach 2:
The patent changes the resistance parameter of the switch dynamically. By controlling the resistance value to be low during turn-on and high during turn-off, the patent optimizes both switching speeds. The control circuit adjusts the resistance parameter based on the gate-source voltage and drain-source voltage conditions, enabling the switch to achieve both fast turn-on and fast turn-off without the limitations of a fixed resistive element.
2Adaptability or versatility
If the switch is realized by placing two MOS transistors in series with intrinsic diodes in antiseries, then the switch can interrupt current independently from voltage polarity, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing a control circuit that can handle both positive and negative voltage polarities using the same basic transistor structure. The control circuit includes absolute value circuits and control logic that process both polarities uniformly, allowing the switch to function correctly regardless of voltage polarity without requiring fundamentally different hardware configurations for each polarity case.
Solution Approach 2:
The patent introduces control circuits as intermediary elements between the input signal and the transistor gates. These intermediary circuits (including absolute value circuits, comparators, and control logic) process the input signal and generate appropriate gate control signals that ensure correct switching behavior for both positive and negative voltage polarities, thereby simplifying the overall system design while maintaining polarity independence.
3Reliability
If a level shifter is used to convert control signal voltage to high voltage reference level, then the switch can be controlled at high voltage, but the device complexity and power consumption increase
Solution Approach 1:
The patent changes the voltage parameter dynamically based on the switching state. The control circuit generates gate control voltages that are adapted to the instantaneous drain-source voltage conditions. During high voltage operation, appropriate high voltage levels are applied; during low voltage operation, lower voltage levels suffice. This dynamic parameter adjustment reduces unnecessary power consumption while maintaining high voltage control capability when required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed driving configuration achieves switch times of approximately 200 ns for both ON and OFF states, ensuring rapid and efficient switching while maintaining the ON or OFF state without continuous power dissipation.
Implementation Method 1
clamp circuits with Zener diodes and capacitors to manage current values and ensure correct switching states
Implementation Method 2
clamp circuits with Zener diodes and capacitors to manage current values and ensure correct switching states
Data Source
AI summary
A driving circuit of a switch includes first and second transistors connected in series to each other and to relative intrinsic diodes in antiseries and driven by a driving device that includes at least one first and one second output terminal connected to the switch to supply it with a first control signal for driving the switch in a first working state and a second control signal for driving the switch in a second working state. At least one latch circuit coupled between respective common gate and source terminals of the first and second transistors supplies the common gate terminal with the first and second control signals, respectively, according to the working state to turn off and turn on the first and second transistors.


