Switch Fabric Chip Route Table Multiplexing for Mode Adaptation
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Solution Overview
Problem
Existing Switch Fabric (SF) chips in core switching networks face challenges in adapting to different working modes, which affects their scalability, power consumption, and reliability due to the need for separate processing circuits for each mode.
Innovation Solution
The SF chip employs a method that includes a unicast and multicast route table lookup mechanism, performing load balancing and outputting cells based on the determined bitmaps, allowing it to adapt to SF13 and SF2 modes by selecting appropriate route tables and output links, thereby optimizing cell processing across different modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate processing circuits are set for each working mode of the SF chip, then the SF chip can adapt to different working modes, but the scale and power consumption of the chip increase
Solution Approach 1:
The patent implements a universal processing circuit that can handle multiple working modes (SF13 mode and SF2 mode) through a single unified design. The circuit uses a common route table lookup mechanism and bitmap processing logic that works for both modes, eliminating the need for separate dedicated circuits for each mode. This multi-functional approach maintains adaptability while reducing chip scale.
Solution Approach 2:
The patent employs dynamic configuration where the same processing circuit can adapt its behavior based on the working mode through configurable parameters and logic. The circuit dynamically selects appropriate processing paths and parameters based on mode identification, allowing a single circuit design to serve multiple functions without requiring hardware changes or separate circuits for each mode.
2Adaptability or versatility
If separate processing circuits are set for each working mode of the SF chip, then the SF chip can adapt to different working modes, but power consumption increases
Solution Approach 1:
The patent implements a universal processing circuit that can handle multiple working modes (SF13 mode and SF2 mode) through a single unified design. The circuit uses a common route table lookup mechanism and bitmap processing logic that works for both modes, eliminating the need for separate dedicated circuits for each mode. This multi-functional approach maintains adaptability while reducing chip scale.
Solution Approach 2:
The patent employs dynamic configuration where the same processing circuit can adapt its behavior based on the working mode through configurable parameters and logic. The circuit dynamically selects appropriate processing paths and parameters based on mode identification, allowing a single circuit design to serve multiple functions without requiring hardware changes or separate circuits for each mode.
3Adaptability or versatility
If separate processing circuits are set for each working mode of the SF chip, then the SF chip can adapt to different working modes, but reliability of the chip is affected
Solution Approach 1:
The patent implements a universal processing circuit that can handle multiple working modes (SF13 mode and SF2 mode) through a single unified design. The circuit uses a common route table lookup mechanism and bitmap processing logic that works for both modes, eliminating the need for separate dedicated circuits for each mode. This multi-functional approach maintains adaptability while reducing chip scale.
Solution Approach 2:
The patent employs dynamic configuration where the same processing circuit can adapt its behavior based on the working mode through configurable parameters and logic. The circuit dynamically selects appropriate processing paths and parameters based on mode identification, allowing a single circuit design to serve multiple functions without requiring hardware changes or separate circuits for each mode.
Data Source
AI summary
A cell processing method and device for a Switch Fabric (SF) chip are disclosed, which belong to the field of communications. The SF chip includes a unicast route table, which is multiplexed in two working modes and is looked up according to a unicast cell, and a multicast route table, which is multiplexed in the two working modes and is looked up according to a multicast cell. The cell processing method for an SF chip includes: the SF chip receives a cell and an input link number corresponding to the cell from an upstream apparatus and extracts a destination Identifier (ID) of the cell; the SF chip looks up a route table according to a working mode of the SF chip, the destination ID and the input link number to determine a first bitmap corresponding to the cell; and the SF chip performs load balancing on the first bitmap to obtain a second bitmap and outputs the cell to a downstream apparatus according to the second bitmap. With the technical solutions of the disclosure, the SF chip in a cascade switching system can adapt to different working modes.