Switch Failure Detection via Signal Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional information processing systems with a single switch connecting CPUs to memories face reliability issues due to the failure of the switch affecting all CPUs, necessitating a method for failure detection and timely switching to a standby system.
Innovation Solution
An information processing apparatus with a control device, an active system switch LSI, and a standby system switch LSI, where the standby switch LSI acquires and compares memory access signals to detect failures by matching the content of memory accesses, allowing seamless switching if the active switch fails.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single switch connects CPUs to memories, then the device complexity is reduced, but the reliability deteriorates because switch failure affects all CPUs
Solution Approach 1:
The patent divides the single switch into multiple switches (first switch and second switch). Each switch independently connects CPUs to memories, so that failure of one switch does not affect the other. This segmentation resolves the contradiction by maintaining simplified connection logic while improving reliability through redundancy.
Solution Approach 2:
The patent changes the parameter of switch quantity from one to two, creating a redundant configuration. By introducing a standby switch that can take over when the active switch fails, the system maintains reliability without significantly increasing complexity, as the switches operate in a hot-standby mode.
2Reliability
If multiple switches are used to improve reliability, then the reliability improves, but the device complexity increases
Solution Approach 1:
The patent implements a dynamic switching mechanism where the standby switch monitors the active switch and automatically takes over when failure is detected. This dynamic behavior allows the system to maintain high reliability through redundancy while keeping the operational complexity low, as only one switch is actively processing at any given time.
Solution Approach 2:
The standby switch is essentially a copy of the active switch, duplicating its functionality. This copying approach allows reliability improvement through redundancy while minimizing complexity, as the standby unit can be identically configured and simply activated when needed, rather than requiring complex coordination between different switch types.
3Reliability
If switch failure detection is implemented, then the reliability improves, but the device complexity increases due to additional monitoring mechanisms
Solution Approach 1:
The patent implements a feedback mechanism where the standby switch monitors signals from the active switch (such as clock signals or data signals) to detect failures. When the standby switch detects that the active switch has failed, it automatically takes over. This feedback-based detection resolves the contradiction by providing reliable failure detection without requiring complex external monitoring systems.
Solution Approach 2:
The failure detection and switching mechanism is self-service, meaning the standby switch autonomously monitors the active switch and performs the switching operation without external intervention. This self-service approach improves reliability through continuous monitoring while minimizing added complexity, as the monitoring function is integrated into the existing switch architecture rather than requiring separate external monitoring equipment.
Data Source
AI summary
An information processing apparatus includes a storage device, an arithmetic processing unit, a first converting device, and a second converting device. The storage device outputs data in accordance with a memory access request. The arithmetic processing unit performs an arithmetic operation on the data. The first converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal and sends to the storage device. The second converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal, acquires the memory access signal sent by the first converting device, and compares the content of a memory access performed by using the converted memory access signal with the content of a memory access performed by using the acquired memory access signal, and determines whether the first converting device has failed.