Switch FIFO Buffer Temporal Alignment via Pre-calculated Skew
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Solution Overview
Problem
Existing switch technologies face challenges in aligning data units from different input ports due to varying delays and path lengths, making simultaneous switching by the switch fabric difficult, especially when one data unit is missing or delayed.
Innovation Solution
The implementation of a system with a plurality of memories and an input circuit that supplies data units based on calculated skews relative to a reference time, ensuring that output data units are temporally aligned before entering the switch fabric, regardless of the availability of the slowest data unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data units are supplied to FIFO buffers for temporal alignment, then simultaneous switching by the switch fabric is achieved, but the system cannot handle missing data units effectively
Solution Approach 1:
The patent pre-calculates and stores skew values for each input port before data units arrive. This preliminary action allows the system to determine the correct fill duration for each FIFO buffer in advance, enabling the system to handle missing data units by using pre-computed timing information rather than waiting for all data units to arrive.
Solution Approach 2:
The patent introduces a control circuit as an intermediary that receives a reference signal and generates fill duration signals based on pre-stored skew values. This intermediary decouples the temporal alignment function from the data unit flow, allowing the system to maintain synchronization even when data units are missing or delayed.
2Manufacturing precision
If the system waits for the slowest data unit to arrive before filling FIFO buffers, then temporal alignment is achieved, but processing efficiency decreases when the slowest data unit is missing
Solution Approach 1:
The system pre-calculates skew values and stores them in the control circuit before data units arrive. This eliminates the need to wait for the slowest data unit to determine fill duration, as the timing information is already available from pre-computed skew values, thereby maintaining both precision and efficiency.
Solution Approach 2:
The patent replaces the mechanical waiting process (physically waiting for the slowest data unit to arrive) with an informational system (using pre-calculated skew values). This substitution allows the system to determine correct fill durations immediately upon receiving data units, significantly improving processing efficiency while maintaining temporal alignment precision.
3Manufacturing precision
If different FIFO buffers are filled based on actual data unit arrival times, then temporal alignment is achieved, but the system complexity increases to track each data unit's arrival time
Solution Approach 1:
The patent replaces the complex mechanism of tracking actual arrival times of individual data units with a simpler informational system using pre-calculated skew values. Each input port's skew value is stored in advance, eliminating the need for continuous monitoring and calculation of arrival times, thus reducing system complexity while maintaining alignment precision.
Solution Approach 2:
The system changes the parameter from dynamic arrival time tracking to static pre-calculated skew values. By transforming the timing information from a dynamic parameter (actual arrival time) to a static parameter (pre-stored skew value), the system simplifies its operation while maintaining the ability to achieve precise temporal alignment.
Data Source
AI summary
Consistent with the present disclosure, a plurality of FIFO buffers, for example, are provided in a switch, which also includes a switch fabric. Each of the plurality of FIFOs is pre-filled with data for a duration based on a skew or time difference between the time that a data unit group is supplied to its corresponding FIFO and a reference time. The reference time is the time, for example, after a delay period has lapsed following the leading edge of a synch signal, the timing of which is a known system parameter and is used to trigger switching in the switch fabric. Typically, the delay period may be equal to the latency (often, another known system parameter) or length of time required for the data unit to propagate from an input circuit, such as a line card of the switch or another switch, to the FIFO that receives the data unit. At the reference time, temporally aligned data unit groups may be read or output from each FIFO and supplied to the switch fabric. Since the timing of the output from the FIFOs is based on known system parameters, instead of the actual arrival of the slowest data unit group at its corresponding FIFO, time aligned data unit groups may be output regardless of whether the slowest data unit group is available.