Switch Flow Table Indexing for Packet Processing Speed

Solution Overview

Problem

Existing flow table entry addressing methods in SDN networks face inefficiencies and complexities due to metadata matching, requiring dedicated hardware and extra hash operations, leading to high costs and low processing speeds.

Innovation Solution

A method where a switch receives a packet, matches it based on a previous flow table, and sends storage index information to a lower-level flow table using a write storage index instruction, allowing direct addressing of flow table entries without content matching or hash operations, thereby improving processing efficiency and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If metadata matching is used to address flow table entries, then flow table entry addressing can be implemented, but dedicated hardware is required and extra hash operations are needed, leading to high costs and low processing speeds

Engineering Contradiction:

Improvepacket processing speedVSAvoidhardware complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the addressing function from the metadata matching process. Instead of using metadata content for matching in the lower-level flow table, the system writes storage index information (pointers) in the upper-level flow table and uses these indices to directly address entries in the lower-level flow table. This separation eliminates the need for dedicated metadata matching hardware and extra hash operations, reducing device complexity while maintaining addressing capability.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary action by pre-calculating and storing storage index information in the upper-level flow table before packet arrival. When a packet matches an entry in the upper-level flow table, the pre-computed storage index is directly used to address the lower-level flow table, eliminating the need for real-time hash operations and reducing packet processing delay.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If metadata matching is used to address flow table entries, then flow table entry addressing can be implemented, but extra hash operations are required, leading to low processing speeds

Engineering Contradiction:

Improvepacket processing speedVSAvoidprocessing delay

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-calculating and storing storage index information in the upper-level flow table before packet arrival. When a packet matches an entry in the upper-level flow table, the pre-computed storage index is directly used to address the lower-level flow table, eliminating the need for real-time hash operations and reducing packet processing delay.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical hash operation process with a direct indexing mechanism. Instead of performing hash operations on metadata to derive table indices, the system uses pre-computed storage indices stored in the flow table entries, substituting a complex computational process with a simple memory access operation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Ease of operation

If metadata matching is used to address flow table entries, then flow table entry addressing can be implemented, but dedicated hardware is required, leading to high device costs

Engineering Contradiction:

Improveaddressing capabilityVSAvoidhardware requirements

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts the addressing function from the metadata matching process. Instead of using metadata content for matching in the lower-level flow table, the system writes storage index information (pointers) in the upper-level flow table and uses these indices to directly address entries in the lower-level flow table. This separation eliminates the need for dedicated metadata matching hardware and extra hash operations, reducing device complexity while maintaining addressing capability.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses storage index information as a copy or pointer to the actual flow table entry location. Instead of performing content-based addressing that requires complex hardware, the system copies the storage index from the upper-level flow table entry and uses it to directly access the lower-level flow table, replacing complex addressing hardware with simple pointer-based access.

Inventive Principle:

Principle #26Copying

Data Source

PatentUS10015095B2Flow table-based table entry addressing method, switch, and controller

Publication Date: 2018.07.03 HUAWEI TECH CO LTD

AI summary

The present application provides a flow table-based table entry addressing method, a switch, and a controller. The method includes: receiving, by a switch, a packet; matching, by the switch, the packet based on a previous flow table; after matching is successful, sending, by the switch based on a write storage index instruction in a flow table entry that is successfully matched, storage index information along with the packet to a lower-level flow table, where, the storage index information corresponds to a flow table entry in the lower-level flow table, and the write storage index instruction is sent by a controller; and directly addressing, by the switch in the lower-level flow table based on the storage index information, the flow table entry corresponding to the storage index information.