Switch Interlock Logic for Break-Before-Make Voltage Supply Paths

The patent replaces the mechanical time delay circuitry with a logic gate-based control system that monitors the actual state of switches and shunt paths. Instead of using fixed time delays, the system uses logic gates to detect when switches are fully off before enabling the next switch, thereby eliminating unnecessary delay while maintaining safety.

The patent implements feedback mechanisms where logic gates continuously monitor the state of switches and shunt paths. The control signals are adjusted based on the actual switching state, creating a closed-loop system that ensures breaks-before-make without relying on predetermined time delays. This feedback approach allows the system to adapt to varying switching conditions and minimize delay.

The patent turns off the shunt path before turning on the through-path, creating a preliminary condition that prevents conflicting voltage levels. This preliminary action allows the NFETs to be sized for current handling without compromising switching speed, as the logic gate control ensures safe switching sequences regardless of the NFET size.

The patent uses dynamic control signals generated by logic gates that adapt to the actual switching state. The control signals are not fixed but change based on the real-time status of switches and shunt paths, allowing the system to optimize switching performance while maintaining safe operation with larger NFETs.