Tiled Switch Matrix Permutation Circuit for Flexible Data Patterns
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Solution Overview
Problem
Existing data processing systems face limitations in dynamically handling various data pattern permutations, particularly in dynamic systems where multiple permutations are required, such as in artificial intelligence processors, as they often rely on custom circuits for limited permutations.
Innovation Solution
A tiled switch matrix data permutation circuit comprising a plurality of adjacent switching blocks with a permutation circuit that receives data in one pattern and outputs it in a different pattern based on switch control settings, utilizing a combination of switching stages that span multiple blocks and additional intermediate stages for efficient data manipulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If custom circuits are used for limited permutations, then device complexity is reduced, but adaptability deteriorates
Solution Approach 1:
The switch matrix circuit is designed to perform multiple data permutation functions using a single unified structure. The circuit can implement various permutation patterns (e.g., transposing different matrix dimensions, different data shuffling patterns) by configuring the switching elements according to different control signals, eliminating the need for multiple custom circuits for different permutation needs.
Solution Approach 2:
The circuit employs dynamically configurable switching elements that can change their connection patterns based on control inputs. The switching stages can be reconfigured on-the-fly to achieve different permutation patterns, allowing the system to adapt to varying data processing requirements without physical reconfiguration or multiple dedicated circuits.
2Adaptability or versatility
If a tiled switch matrix with multiple switching stages is used, then adaptability improves, but device complexity increases
Solution Approach 1:
The switch matrix is divided into multiple adjacent switching blocks, each containing switching stages. This segmentation allows the complex permutation task to be distributed across multiple smaller, manageable units. Each switching block handles a portion of the data permutation, and the collective operation of all blocks achieves the overall permutation goal, making the system more manageable and scalable.
Solution Approach 2:
The switching stages are arranged in a nested hierarchical structure where smaller switching units are combined to form larger permutation capabilities. The switching blocks contain switching stages that operate at different levels of granularity, with inner stages handling finer-grained data reordering and outer stages coordinating broader data flow patterns, creating a nested architecture that efficiently manages complexity.
3Productivity
If switching stages span multiple adjacent switching blocks, then productivity improves, but device complexity increases
Solution Approach 1:
Switching stages are designed to span multiple adjacent switching blocks, merging the functionality of individual blocks into coordinated multi-block operations. This allows data to be permuted across block boundaries in a single coordinated pass, improving throughput and efficiency. The switching control logic coordinates the combined operation of multiple blocks to achieve complex permutations that would require multiple passes through individual blocks.
Data Source
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AI summary
Embodiments of the present disclosure pertain to switch matrix circuit including a data permutation circuit. In one embodiment, the switch matrix comprises a plurality of adjacent switching blocks configured along a first axis, wherein the plurality of adjacent switching blocks each receive data and switch control settings along a second axis. The switch matrix includes a permutation circuit comprising, in each switching block, a plurality of switching stages spanning a plurality of adjacent switching blocks and at least one switching stage that does not span to adjacent switching blocks. The permutation circuit receives data in a first pattern and outputs the data in a second pattern. The data permutation performed by the switching stages is based on the particular switch control settings received in the adjacent switching blocks along the second axis.