Network Switch Shared Memory Bank Configuration
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Solution Overview
Problem
Network devices face challenges in designing shared memory systems that are cost-effective and efficient, as dual port and multi-port memories are more expensive and complex compared to single port memories, despite offering higher capabilities that may not be necessary for all applications.
Innovation Solution
A network switch device with a memory controller that allocates and configures single port memory banks into different configurations, such as single port or virtual multi-port configurations, based on processor device requirements, allowing for flexible memory access and utilization without the need for additional costly hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dual port or multi-port memory banks are used to provide multiple concurrent memory accesses, then memory access capability is improved, but cost and complexity increase
Solution Approach 1:
The memory bank configuration is made dynamic through runtime reconfiguration capability. The system can switch between single-port and virtual multi-port modes based on actual access requirements, allowing the same physical memory bank to adapt its functionality. This dynamic approach enables the system to achieve multi-port performance when needed while maintaining single-port simplicity when sufficient, thereby resolving the contradiction between access capability and complexity.
Solution Approach 2:
The invention changes the operational parameters of memory banks through configuration modes. By adjusting parameters such as enablement status, port configuration (single vs. multi-port mode), and association relationships between processor devices and memory banks, the system can achieve different performance levels from the same hardware resources. This parameter-based control allows flexible adaptation without hardware changes, resolving the cost-complexity issue.
2Productivity
If dual port or multi-port memory banks are used to support multiple concurrent accesses, then memory access performance is improved, but cost increases
Solution Approach 1:
The invention makes single-port memory banks universal by enabling them to serve multiple functions and multiple processor devices through virtual multi-port configuration. The same physical memory bank can be shared among multiple processor devices with different access patterns, effectively providing multi-port functionality without requiring actual multi-port hardware. This universality reduces manufacturing costs while maintaining high access performance.
Solution Approach 2:
The system creates virtual copies of memory port functionality through software/firmware control rather than physical hardware copies. The memory controller virtualizes multi-port access by managing timing and arbitration, creating the effect of multiple ports without duplicating the physical memory interface hardware. This virtual copying approach achieves performance improvement without the proportional cost increase of physical multi-port memories.
3Ease of manufacture
If single port memory banks are used to reduce cost and complexity, then manufacturing cost is reduced, but memory access capability is limited
Solution Approach 1:
The system dynamically configures memory bank operations based on real-time access requirements. When multiple processor devices need concurrent access, the memory controller activates virtual multi-port mode, allowing single-port physical banks to behave as multi-port banks through careful timing and arbitration. This dynamic behavior enables cost-effective single-port hardware to deliver multi-port performance when needed, resolving the capability limitation.
Solution Approach 2:
The memory controller acts as an intermediary that mediates access requests from multiple processor devices to single-port memory banks. It manages arbitration, timing, and configuration, enabling multiple devices to access the same memory bank concurrently without requiring actual multi-port hardware. This intermediary layer allows cost-effective single-port memories to serve multiple devices with advanced access patterns.
4Speed
If memory banks are configured for high performance with multiple ports, then memory access speed is improved, but device complexity increases
Solution Approach 1:
The memory controller manages multiple configuration parameters (enablement status, port mode, processor device associations) for each memory bank. By dynamically adjusting these parameters based on access patterns, the system achieves high-speed multi-port performance when needed while maintaining simpler single-port operation otherwise. This parameter-based control allows the same hardware to deliver different performance levels without proportional increases in complexity.
Data Source
AI summary
A network switch device is described. The network switch device includes a plurality of processor devices configured to perform different respective functions of the network switch device, a block of shared memory having a plurality of single port memory banks, and a memory controller configured to allocate respective sets of banks among the single port memory banks to processor devices among the plurality of processor devices, and determine respective configurations of the sets of memory banks as one of i) a single port configuration in which respective single port memory banks support a single read or write memory operation to a memory location in a memory access cycle, and ii) a virtual multi-port configuration in which respective single port memory banks support two or more concurrent read or write memory operations to a same memory location, based on memory access requirements of the corresponding processor device.