Internal Packet Arbitration and Queue Merging for Bursty Switch Traffic
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Solution Overview
Problem
Existing methods for enqueueing internally generated packets in network switches result in doubled bandwidth requirements, which are expensive in terms of area and power consumption due to the low average but bursty nature of these packets.
Innovation Solution
A scalable internal packet generation scheme utilizing an internal queueing engine (IQE) and arbitration logic to manage and enqueue internally generated packets, absorbing bursts and arbitrating traffic types, with rate limiting and priority queuing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If brute force methods are used to enqueue internally generated packets, then all packets can be handled, but the enqueue bandwidth doubles, increasing area and power consumption
Solution Approach 1:
The patent applies preliminary action by pre-allocating dedicated enqueue resources for internally generated packets separate from externally arriving packets. This allows the system to handle internal packet bursts without requiring doubled total bandwidth, as the internal packet enqueue path is prepared in advance with its own buffers and arbitration logic.
Solution Approach 2:
The patent segments the packet enqueueing process into separate paths: one for externally arriving packets and another for internally generated packets. This segmentation allows independent resource allocation and arbitration for each packet type, preventing internal packets from consuming bandwidth meant for external packets while still providing full handling capability.
2Productivity
If dedicated enqueue resources are allocated for internally generated packets, then burst traffic is handled effectively, but device area increases
Solution Approach 1:
The patent merges the internal packet enqueue operation with the existing external packet enqueue infrastructure at the memory interface level. Both packet types share the same physical memory buffers and transmission resources, eliminating the need for separate dedicated hardware paths while still providing burst handling capability through logical separation and arbitration.
Solution Approach 2:
The patent makes the enqueue infrastructure universal by designing it to handle both external and internal packet types through a unified arbitration mechanism. The same memory management unit and buffer resources serve multiple packet sources, with arbitration logic that prioritizes based on packet type and buffer availability, rather than requiring separate dedicated resources for each packet source.
3Adaptability or versatility
If multiple packet sources are supported, then system versatility increases, but arbitration complexity increases
Solution Approach 1:
The patent applies local quality by implementing source-specific arbitration parameters and buffer characteristics. Each packet source (external ingress points, internal packet generators) has its own configured priority levels, buffer sizes, and arbitration weights that can be independently adjusted. This allows the arbitration logic to handle multiple sources efficiently by making localized decisions based on source-specific qualities rather than requiring complex global arbitration for all sources simultaneously.
Data Source
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AI summary
An apparatus for scalable internal packet generation is provided. The apparatus includes one or more ingress points (IPa - IPn), one or more internal packet sources configured to generate one or more second packets, and a memory management unit (110). The memory management unit (110) includes an internal queueing engine and merge function logic (210). The internal queueing engine is configured to obtain the one or more second packets from one or more internal packet sources and enqueue each of the one or more second packets in a respective first queue of the one or more first queues. Arbitration logic (315) is configured to determine an order in which the one or more second packets are dequeued from the one or more first queues. Merge function logic (210) is configured to combine the one or more second packets from the internal queueing engine with the one or more first packets.