Buffered Switch Port Handshake for Low-Latency Data Exchange

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Solution Overview

Problem

Existing switch technologies suffer from high data transmission latency due to the need to completely receive data before transmission, which limits the utilization of bidirectional transmission capabilities and increases waiting times, especially in modern computer systems using PCIe buses.

Innovation Solution

A switch design with independently connected receiving and sending ends, each with dedicated buffers, allows data transmission to proceed without complete data reception, utilizing bidirectional transmission paths and optimizing data re-transmission mechanisms to reduce latency and improve efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If store-and-forward technology is used to ensure data transmission accuracy, then data reliability is improved, but data transmission latency increases

Engineering Contradiction:
Improvedata transmission accuracyVSAvoiddata transmission latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The receiving end performs address matching and sends data transmission requests before the entire data packet is received. By initiating the transmission process in advance (preliminary action) once the destination address is known, the system reduces waiting time while maintaining reliability through buffer storage and acknowledgment mechanisms.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If unidirectional transmission is used to simplify switch design, then device complexity is reduced, but bidirectional transmission capability is lost

Engineering Contradiction:
Improveswitch design complexityVSAvoidbidirectional transmission capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

Each data transmission port is segmented into independent receiving end and sending end components with separate buffers. This segmentation allows the switch to perform receive and send operations independently and simultaneously, achieving full bidirectional transmission capability while keeping each component's design relatively simple.

Inventive Principle:
Principle #1Segmentation

3Reliability

If data is completely received before transmission to improve accuracy, then data reliability is improved, but transmission speed decreases

Engineering Contradiction:
Improvedata transmission accuracyVSAvoiddata transmission speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system initiates the data transmission process before complete data reception by sending transmission requests once the destination address is received. The remaining data is subsequently transmitted from the buffer, enabling preliminary action that accelerates transmission speed while maintaining reliability through buffered storage and acknowledgment protocols.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If a device must wait to send data after receiving it to ensure proper transmission, then data reliability is improved, but productivity decreases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddata transmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The receiving end and sending end operate continuously and independently. While the receiving end receives data and sends requests, the sending end simultaneously processes and transmits data to other destinations. This continuity of useful action eliminates idle waiting time and improves overall transmission efficiency while maintaining reliability through independent buffer management and acknowledgment mechanisms.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20260113279A1Switch, data transmission method, and system for reducing data exchange latency
Publication Date: 2026.04.23 NXCOREBASE SEMICONDUCTOR CORP
  • US20260113279A1 patent drawing
  • US20260113279A1 patent drawing
  • US20260113279A1 patent drawing

AI summary

The present disclosure discloses a switch, a data transmission method, and a system for reducing data exchange latency. The switch comprises a plurality of data transmission ports electrically interconnected. Each port comprises a receiving end and a sending end, and the receiving end and the sending end are respectively configured with a buffer. The receiving end receives and forwards the data to the sending ends of other ports. The receiving end receives and stores data comprising a destination address into corresponding buffer. When completing reception of the destination address, the receiving end sends a request including the destination address to the sending ends. The sending end whose port address matches the destination address returns an acknowledgement to the receiving end. Upon receiving the acknowledgement, the receiving end sends data to the corresponding sending end. The present disclosure can reduce data exchange latency and improve data transmission efficiency.