Decoupled Packet and Cell Queueing for High-Rate Switch Arbitration

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Solution Overview

Problem

Conventional network switches face challenges in handling high-bandwidth traffic due to simultaneous access of multiple unique flows, linked-list based queueing structures, and shared storage traversals, leading to inefficiencies in packet handling and increased latency.

Innovation Solution

A scalable output queued architecture with decoupled packet and cell queueing, where packet and cell control operations are handled independently, using separate pointers and storage for efficient admission control and queue management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If packets undergo thresholding operations and admission control at a shared batching point, then packet processing is centralized, but handling many-to-one traffic becomes expensive as data rate increases

Engineering Contradiction:
Improvecentralized packet processingVSAvoidtraffic handling efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the packet processing function by removing the shared batching point and distributing admission control to individual output queues. Each output queue independently handles packets destined for its associated egress port, eliminating the bottleneck at the centralized batching point and enabling scalable many-to-one traffic handling.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If enqueued packets are stored in a linked list-based queueing structure with shared storage, then memory usage is reduced, but the number of reads/writes to shared storage increases at high bandwidth

Engineering Contradiction:
Improvememory usageVSAvoidqueueing speed
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments the shared storage into per-queue storage structures. Each output queue maintains its own storage for enqueued packets and control information, eliminating the need to traverse a shared linked list and perform reads/writes to shared storage at high bandwidth rates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional shared storage structure to a multi-dimensional structure where storage is organized by queue identifier. This dimensional reorganization allows parallel access to different queues without contention, significantly improving queueing throughput at high bandwidth.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If admission control state of multiple unique flows is accessed simultaneously, then comprehensive flow management is achieved, but processing latency increases

Engineering Contradiction:
Improveflow management capabilityVSAvoidprocessing latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments admission control into independent per-queue controllers. Each output queue independently manages admission control for flows destined to its egress port, eliminating the need to access multiple flows' admission states simultaneously. This segmentation reduces processing latency while maintaining comprehensive flow management through distributed decision-making.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4687336A1Scalable output queued architecture with decoupled packet and cell queueing
Publication Date: 2026.02.04 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • EP4687336A1 patent drawingFigure 1
  • EP4687336A1 patent drawingFigure 2
  • EP4687336A1 patent drawingFigure 3

AI summary

A network device with decoupled packet and cell queueing is provided. The network device includes a traffic manager (115) configured to obtain the one or more packets. The traffic manager (115) further includes a packet storage configured to store one or more pointers associated with a packet of the one or more packets, the one or more pointers comprising a first type of pointer and a second type of pointer, and a cell storage configured to store cell control information of at least part of the one or more cells of the packet, wherein the cell control information includes a respective first type of pointer for each of the at least part of the one or more cells. The traffic manager (115) further includes admission control logic (125) configured to perform an admission check of the one or more packets without the cell control information of the one or more packets.