Switch Shared Buffer Allocation to Resolve Head-of-Line Blocking

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Solution Overview

Problem

Legacy input-queued switches face performance issues due to head-of-line (HOL) blocking, where packets at the head of a queue are unable to be serviced, leading to blocking of subsequent packets even if they do not have resource conflicts, resulting in inefficient operation and potential transmission point blocking.

Innovation Solution

The implementation of a switch with queue points that include shared buffers and controllers to dynamically allocate space from a shared buffer to individual queues based on available space, allowing packets to be buffered efficiently and preventing transmission point blocking, even if output ports are busy, by mimicking a larger buffer without the need for dedicated larger buffers on each queue.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a legacy input-queued switch uses traditional queue buffers, then the switch structure is simple, but head-of-line blocking occurs and operational efficiency deteriorates

Engineering Contradiction:
Improveoperational efficiencyVSAvoidswitch structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple queue buffers into a shared buffer pool, where multiple queues can dynamically allocate buffer space from the shared resource. This eliminates the head-of-line blocking problem because packets from different queues can be serviced independently even when one queue is blocked, while maintaining overall buffer efficiency through shared resources.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements dynamic buffer allocation where the amount of buffer space assigned to each queue can change over time based on traffic conditions. The buffer management controller dynamically adjusts the buffer pointers and allocation boundaries, allowing the system to adapt to varying traffic patterns and prevent HOL blocking while optimizing buffer utilization.

Inventive Principle:
Principle #15Dynamics

2Productivity

If dedicated larger buffers are allocated to each queue to prevent blocking, then HOL blocking is prevented, but buffer space requirements and device resources increase

Engineering Contradiction:
Improvepacket transmission efficiencyVSAvoidbuffer space requirements
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

Instead of allocating dedicated large buffers to each queue, the patent combines buffer resources into a shared pool that serves multiple queues. This allows the system to prevent blocking through dynamic allocation without requiring each queue to have its own large dedicated buffer, thus reducing total buffer space requirements while maintaining transmission efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared buffer pool serves multiple queues simultaneously, making the buffer resource universal rather than dedicated to a single queue. This multi-functional buffer structure allows any queue to access buffer space when needed, preventing blocking without requiring excessive buffer capacity in any single queue.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If queue buffers are made smaller to reduce resource requirements, then device resources are optimized, but transmission point blocking increases

Engineering Contradiction:
Improvebuffer resourcesVSAvoidtransmission point blocking
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent combines multiple small queue buffers into a shared buffer pool, maintaining small individual buffer allocations while providing access to larger total buffer capacity through the shared resource. This prevents transmission point blocking because queues can access additional buffer space from the shared pool when their local buffers are full, without requiring each queue to have large dedicated buffers.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10454850B2Apparatus and method for buffering data in a switch
Publication Date: 2019.10.22 INTEL CORP
  • US10454850B2 patent drawing
  • US10454850B2 patent drawing
  • US10454850B2 patent drawing

AI summary

Apparatuses, methods and storage medium associated with buffering data in a switch are provided. In embodiments, the switch may include a plurality of queue buffers, a plurality of queues respectively associated with the plurality of queue buffers, a shared buffer, and a queue point controller coupled with the plurality of queue buffers and the shared buffer. In embodiments the queue point controller may be configured to determine an amount of available space in a selected queue buffer of the plurality of queue buffers. The queue point controller may be further configured to allocate at least a portion of the shared buffer to a selected queue that is associated with the selected queue buffer. In embodiments, this allocation may be based on the amount of available space determined in the selected queue buffer. Other embodiments may be described and/or claimed.