Half-Bridge Converter Dead Time Adjustment via Switch Voltage Sampling
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Solution Overview
Problem
Conventional half-bridge DC-DC power converters face inefficiencies due to shoot-through phenomena caused by delays in switch activation and high forward conduction voltage drops in diodes, which are exacerbated by inaccurate dead time control in synchronous rectification technology.
Innovation Solution
An integrated circuit with a sampling processing circuit that adjusts the dead time in the control signal of switches based on sampled voltage, generating a digital signal to precisely control and optimize the duration of dead time, thereby reducing losses and improving converter efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dead time is introduced to avoid shoot-through phenomenon, then switch safety is improved, but converter efficiency deteriorates due to power loss during dead time
Solution Approach 1:
The patent implements dynamic dead time adjustment by using the sampling processing circuit to detect switch voltage waveforms and automatically adjust the dead time duration based on actual switching conditions. This replaces fixed dead time with a dynamic control mechanism that adapts to varying operating conditions, thereby minimizing power loss while ensuring switch safety.
Solution Approach 2:
The sampling processing circuit provides feedback by monitoring the voltage across the switch during switching transitions and using this information to adjust the dead time control signals. This closed-loop feedback mechanism ensures that dead time is precisely controlled to prevent shoot-through while minimizing the duration to reduce power loss.
2Loss of energy
If synchronous rectification technology is used to reduce conduction loss, then converter efficiency is improved, but control complexity increases due to need for precise dead time management
Solution Approach 1:
The sampling processing circuit performs self-service by automatically detecting the switching state of the synchronous rectification MOSFETs and autonomously generating the appropriate dead time control signals. This eliminates the need for complex external control circuits and reduces control complexity while maintaining precise dead time management for efficient synchronous rectification.
Solution Approach 2:
The patent merges the dead time control function with the sampling processing circuit that already exists for other control purposes. By combining multiple functions (voltage sampling, switching state detection, and dead time generation) into a single integrated circuit, the overall control complexity is reduced while achieving precise synchronous rectification control.
3Ease of manufacture
If fixed dead time control is used in conventional converters, then implementation simplicity is maintained, but efficiency is reduced due to inability to optimize dead time duration
Solution Approach 1:
The patent changes the dead time parameter from a fixed value to a dynamically adjustable parameter. The sampling processing circuit continuously monitors switching conditions and adjusts the dead time duration accordingly, allowing the system to optimize dead time loss while maintaining ease of implementation through automated control.
Data Source
AI summary
An integrated circuit and a converter having the same are provided. The converter further includes a first switch, and the integrated circuit includes a second switch and a sampling processing circuit. The control signals of the first and second switches are complementary, and the control signal of the second switch has a dead time. The sampling processing circuit is for sampling the voltage on the second switch to obtain a duration of the dead time and generating the digital signal according to the duration of the dead time. The digital signal is used to adjust the duration of the dead time.