Switchable Cascode Amplifier for High-PAPR Power Efficiency
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Solution Overview
Problem
High peak to average power ratio (PAPR) signaling schemes in RF transmission systems consume more power due to less efficient operation of power amplifiers, which is a challenge in reducing power consumption and increasing data bandwidth.
Innovation Solution
A cascoded amplifier system with a switchable configuration that operates as a common source amplifier up to a threshold output signal level and switches to cascode transistor operation, disabling the common source amplifier to minimize power dissipation and enhance efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high PAPR signaling schemes are used to increase data bandwidth, then bandwidth efficiency is improved, but power consumption increases due to less efficient power amplifier operation
Solution Approach 1:
The patent implements dynamic switching between common source and cascode amplifier configurations based on the operating signal level. The common source amplifier is used for low signal levels where it provides good efficiency, while the cascode amplifier is engaged for high signal levels where it provides superior linearity and efficiency. This dynamic reconfiguration allows the system to maintain high efficiency across the full dynamic range required for high PAPR signaling schemes.
Solution Approach 2:
The patent divides the amplifier function into two separate amplifier configurations (common source and cascode) that operate in different signal level ranges. By segmenting the operating range and assigning different amplifier topologies to different segments, the system optimizes efficiency for each segment while maintaining overall high efficiency for high PAPR signals.
2Use of energy by moving object
If power amplifier is operated closer to compression for power efficient signaling, then power efficiency is improved, but linearity deteriorates
Solution Approach 1:
The system dynamically switches between common source and cascode configurations based on signal level. The common source amplifier operates the power amplifier closer to compression for high efficiency at low signal levels, while the cascode amplifier is activated at high signal levels to provide better linearity and prevent distortion, thus maintaining both efficiency and linearity across different operating conditions.
Solution Approach 2:
Different amplifier configurations are applied to different signal level ranges. The common source configuration is used where efficiency is critical (low signal levels), while the cascode configuration is used where linearity is critical (high signal levels). This local optimization of amplifier topology matches the quality requirements to the specific operating conditions.
3Use of energy by moving object
If cascode transistor operation is used to minimize power dissipation, then power efficiency is improved, but device complexity increases
Solution Approach 1:
The patent segments the amplifier functionality into two distinct configurations (common source and cascode), each optimized for different operating conditions. The cascode configuration is used specifically for high signal levels where it provides superior efficiency, while the common source handles low signal levels. This segmentation allows the system to benefit from cascode efficiency without requiring the cascode configuration to be active at all times, thus managing complexity.
Solution Approach 2:
The system dynamically reconfigures between common source and cascode topologies based on signal level detection. This dynamic switching allows the system to employ the more complex cascode configuration only when necessary (at high signal levels), while using the simpler common source configuration for low signal levels, thus balancing complexity and efficiency requirements.
Data Source
AI summary
In accordance with an embodiment, a system includes a first transistor and a second transistor. The first transistor has a first input node coupled to a first signal input, a first output node coupled to a first common node, and a first reference node coupled to a first reference voltage, and the second transistor has a second input node coupled to second signal input, a second output node coupled to an output of the system, and a second reference node coupled to the first common node. The system further includes a first switch switchably coupling the first common node to a second reference voltage.


