Switchable Impedance Ground Ring for Pixel Array Artifacts
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Solution Overview
Problem
Imaging systems face artifacts due to variations in transistors and components of pixel cells, leading to inaccuracies in light sensing, particularly the 'black hole' artifact caused by non-uniform dark signals across the pixel array.
Innovation Solution
Implementing a switchable impedance to ground, which can switch between low and high impedance values or an open circuit, to reduce or eliminate artifacts by controlling the pixel array's grounding during Correlated Double Sampling and analog-to-digital conversion periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ground line is used to couple the pixel array to ground, then ground reference stability is maintained, but body settling time increases and artifacts occur
Solution Approach 1:
The patent applies dynamics by making the impedance to ground switchable between different states (low impedance and high impedance) based on operational requirements. The switchable impedance circuit transitions from a static ground connection to a dynamic one that adapts its characteristics, allowing low impedance during ADC readout for stability and high impedance during other periods to minimize body settling time and eliminate artifacts.
Solution Approach 2:
The patent changes the impedance parameter of the ground connection dynamically. By switching between low impedance (for ground reference stability during ADC readout) and high impedance (for minimizing body settling time), the system optimizes performance for different operational phases, resolving the contradiction between stability and speed.
2Reliability
If the pixel array is coupled to ground with low impedance, then ground reference stability is maintained, but non-uniform dark signals and black hole artifacts occur
Solution Approach 1:
The switchable impedance circuit dynamically adjusts the ground connection characteristics. During periods when uniform dark signals are critical (before ADC readout), the circuit switches to high impedance to prevent body settling artifacts. During ADC readout, it switches to low impedance for ground reference stability, thus eliminating black hole artifacts while maintaining necessary stability.
Solution Approach 2:
The patent applies preliminary action by pre-switching the impedance to high state before the ADC readout period begins. This preliminary configuration prevents body settling artifacts from occurring in the first place, rather than attempting to correct them afterward, ensuring uniform dark signals are captured from the start.
3Loss of time
If the impedance to ground is kept high, then body settling time is minimized, but ground reference stability deteriorates
Solution Approach 1:
The patent implements periodic action by alternating the impedance state based on the operational phase. During non-ADC periods, high impedance is applied to minimize body settling time. During ADC readout periods, low impedance is applied to ensure ground reference stability. This periodic switching resolves the contradiction by applying the appropriate impedance characteristic at the appropriate time.
Solution Approach 2:
The dynamic switching capability allows the system to adapt impedance characteristics to operational requirements. The circuit transitions from static to dynamic ground connection, optimizing between speed (high impedance) and stability (low impedance) based on real-time operational needs, thus resolving the fundamental trade-off.
Data Source
AI summary
This is generally directed to a switchable impedance to ground. In particular, a pixel array can be coupled to and surrounded by a ground ring. The ground ring can be coupled to a switchable impedance to ground. During a correlated double sampling (“CDS”) phase of the pixel array, the switchable impedance can be set to a high resistance value. For example, the switchable impedance can be set to 500 ohms. During an analog-to-digital conversion (“ADC”) readout phase of the pixel array, however, the switchable impedance can be set to a low resistance value. For example, the switchable impedance can be set to 1-10 ohms. Setting the switchable impedance to the high impedance value during the CDS phase can prevent imaging errors such as black hole artifacts. Setting the switchable impedance to the low impedance value during the ADC readout phase can, for example, prevent errors due to ground drift.