Switchable LNA Input Path Reduces Substrate Routing Complexity
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Solution Overview
Problem
Wireless devices face increased routing complexity on substrates due to multiple antennas supporting 5G communications, leading to inefficiencies in RF signal routing between RF front-end modules and chips, particularly with multiple dedicated routes required for Low-Noise Amplifiers (LNAs) across different frequency bands.
Innovation Solution
A chip with a switchable path between input paths for LNAs, allowing shared routing through a common port for RF signals across different frequency bands, reducing the number of routes on the substrate and providing flexibility in routing options while maintaining performance by controlling switches based on selected frequency bands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple dedicated routes are provided for LNAs across different frequency bands, then routing reliability and signal quality are improved, but substrate routing complexity and device area increase
Solution Approach 1:
The patent merges multiple dedicated LNA routes into a shared common route. The RF front-end module connects to a common port that can be dynamically switched to serve different LNA circuits for various frequency bands (e.g., LTE UHB, 5G sub-6). This consolidation reduces the number of separate routing paths on the substrate while maintaining reliable signal transmission through the shared route with appropriate switching control.
Solution Approach 2:
The common route and common port are designed to serve multiple functions by supporting different frequency bands and LNA circuits through dynamic switching. A single routing infrastructure handles LTE UHB, 5G sub-6, and other frequency bands, making the routing system universal rather than dedicated to each specific band, thereby reducing overall substrate complexity.
2Reliability
If multiple dedicated routes are provided for LNAs across different frequency bands, then signal transmission quality is improved, but manufacturing cost and device area increase
Solution Approach 1:
By combining multiple dedicated routes into a single shared route with switching capability, the patent reduces the total amount of routing infrastructure required on the substrate. This consolidation directly reduces manufacturing costs associated with substrate fabrication, material usage, and assembly complexity, while the switching mechanism ensures signal transmission quality is maintained through dedicated switching paths to each LNA circuit.
3Adaptability or versatility
If separate ports are provided for each LNA circuit, then routing flexibility is improved, but device complexity and area increase
Solution Approach 1:
The patent implements a universal common port that can be dynamically configured to serve different LNA circuits through switching control. This single multi-functional port replaces multiple dedicated ports, reducing chip complexity and area while maintaining routing flexibility. The switching mechanism allows the common port to adapt to different frequency bands and LNA requirements, providing the necessary versatility without the overhead of multiple separate ports.
4Reliability
If multiple dedicated routes are used for RF signal routing, then frequency band performance is improved, but substrate area and routing complexity increase
Solution Approach 1:
The patent merges multiple frequency band-specific routes into a shared common route that serves all frequency bands through dynamic switching. This consolidation significantly reduces the substrate area required for routing, as the shared route is utilized sequentially for different frequency bands (LTE UHB, 5G sub-6, etc.) rather than requiring simultaneous dedicated paths for each band, thereby reducing overall substrate footprint while maintaining frequency band performance.
Data Source
AI summary
According to certain aspects, a chip includes a first port, a first amplifier, and a first input path coupling the first port to an input of the first amplifier. The chip also includes a second port, a second amplifier, and a second input path coupling the second port to an input of the second amplifier. The chip further includes a switchable path coupled between the first input path and the second input path.