Switchable Loop Filter Topology for Multi-Standard PLL Dynamics
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Solution Overview
Problem
High-frequency integrated circuits used in multi-mode transceivers for various communication standards face challenges in reducing chip size and power consumption due to differing requirements for modulation techniques and center frequencies across standards like GSM, WCDMA, and 4G, which demand specific phase-locked loop configurations.
Innovation Solution
A loop filter capable of switching between type I and type II modes of operation, with adjustable elements such as switches, resistors, and capacitors, allowing for non-integrating or integrating signal transfer characteristics, enabling phase-locked loops to adapt to different communication standards by selecting appropriate phase detectors and charge pumps based on the required mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple separate phase-locked loop circuits are implemented to support different communication standards, then the specific requirements for each standard (GSM, WCDMA, 4G) can be met, but the chip size increases
Solution Approach 1:
The loop filter is designed to perform multiple functions by supporting both type I and type II configurations within a single circuit. The filter can be reconfigured between these two modes to accommodate different communication standards (GSM, WCDMA, 4G), eliminating the need for separate dedicated circuits for each standard and thereby reducing overall chip size while maintaining compatibility across all standards
Solution Approach 2:
The loop filter incorporates switchable configurations that allow dynamic reconfiguration between type I and type II modes. This dynamic adaptability enables the same hardware circuit to meet the specific dynamic requirements of different communication standards through controlled switching, rather than requiring static dedicated circuits for each standard
2Adaptability or versatility
If multiple separate phase-locked loop circuits are implemented to support different communication standards, then the specific requirements for each standard can be met, but power consumption increases
Solution Approach 1:
By implementing a single universal loop filter that can operate in both type I and type II modes, the invention eliminates the need for multiple separate circuits. This universal design reduces power consumption because only one circuit needs to be active at any given time, whereas multiple separate circuits would each consume power even when not in use, and the switching mechanism allows the same hardware to serve multiple standards efficiently
Solution Approach 2:
The invention merges the functionality of what would traditionally require separate type I and type II phase-locked loop circuits into a single integrated loop filter. This consolidation combines multiple functions into one circuit, reducing the total power consumption by eliminating redundant circuitry and reducing the overall power management overhead
3Device complexity
If a fixed configuration loop filter is used, then the circuit design is simple, but it cannot meet the different dynamic requirements of various communication standards
Solution Approach 1:
The loop filter incorporates switchable configurations that allow dynamic reconfiguration between type I and type II modes based on the required communication standard. This dynamic capability enables the filter to adapt its characteristics to meet the specific dynamic requirements of different standards while maintaining a relatively simple base design that can be flexibly adjusted through switching mechanisms
4Speed
If type I phase-locked loop configuration is used, then fast loop dynamics are achieved, but phase rigidity is insufficient for continuous signals
Solution Approach 1:
The loop filter can be dynamically switched between type I configuration (providing fast loop dynamics) and type II configuration (providing enhanced phase rigidity). This dynamic reconfigurability allows the system to select the appropriate mode based on the signal type and communication standard requirements, achieving both fast dynamics when needed and strong phase rigidity when required
5Stability of the object's composition
If type II phase-locked loop configuration is used, then phase rigidity is improved for continuous signals, but loop dynamics become slower
Solution Approach 1:
The loop filter enables dynamic switching between type II configuration (providing enhanced phase rigidity for continuous signals) and type I configuration (providing faster loop dynamics). This allows the system to optimize performance by selecting the appropriate configuration based on the specific communication standard and signal characteristics, rather than being constrained to a fixed slower response
Data Source
AI summary
A loop filter includes an input terminal, an output terminal, and a control terminal for a selection signal. At least one low pass filter is disposed between that input terminal and that output terminal. The loop filter is adapted to select a configuration out of a first configuration and at least one second configuration in response to the selection signal. In the first configuration, the loop filter comprises a non-integrating transfer characteristic in operation. In the second configuration, the loop filter comprises an integrating signal transfer characteristic in operation.