Switchable Output Impedance Buffer for Memory Standby Power

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Solution Overview

Problem

Existing output buffers in memory systems, such as DIMMs, face high power dissipation due to termination resistors and increased power consumption by line receivers during standby mode, which is undesirable.

Innovation Solution

An output buffer with a switchable output impedance that adjusts between a low value in normal mode and a higher value in standby mode, reducing power dissipation by increasing impedance and shifting signal line voltage to minimize line receiver power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the output buffer uses a tri-state output with high impedance during standby mode, then power dissipation from the termination resistor is reduced, but the signal line voltage shifts to a level that causes line receivers to consume excessive power

Engineering Contradiction:

Improvepower dissipation from termination resistorVSAvoidpower consumption by line receiver

Core Design Contradiction:

Loss of energyVSUse of energy by stationary object

Solution Approach 1:

The patent applies dynamics by making the output impedance switchable between two states: a low impedance state during normal operation and a high impedance state during standby mode. This dynamic switching allows the system to optimize power consumption at different operational phases, resolving the contradiction between reducing termination resistor dissipation and avoiding line receiver power spikes.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameter of output impedance between two defined states. By switching the output impedance from low to high during standby, the signal line voltage is controlled to remain at a level that minimizes line receiver power consumption, thereby resolving the energy loss contradiction.

Inventive Principle:

Principle #35Parameter changes

2Use of energy by stationary object

If the output buffer maintains low output impedance during standby mode, then line receiver power consumption is minimized, but power dissipation from the termination resistor increases significantly

Engineering Contradiction:

Improvepower consumption by line receiverVSAvoidpower dissipation from termination resistor

Core Design Contradiction:

Use of energy by stationary objectVSLoss of energy

Solution Approach 1:

The patent employs dynamic impedance switching, transitioning the output buffer from a low impedance state during normal operation to a high impedance state during standby. This dynamic adjustment allows the system to minimize termination resistor power dissipation during standby while maintaining low line receiver power consumption, effectively resolving the energy trade-off.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent modifies the output impedance parameter between operational modes. During standby, the impedance is switched to a high state, which simultaneously reduces both termination resistor dissipation and line receiver power consumption, resolving the apparent contradiction between these two energy-related parameters.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If termination resistors are connected to signal lines, then signal quality is improved, but static power dissipation increases to unacceptable levels

Engineering Contradiction:

Improvesignal qualityVSAvoidstatic power dissipation

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by implementing a switchable output impedance that adapts to operational requirements. During normal operation, the low impedance state ensures good signal quality while driving the terminated line. During standby, the high impedance state dramatically reduces power dissipation. This dynamic behavior resolves the contradiction between maintaining signal quality and reducing energy loss.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the output impedance parameter based on operational mode. By switching from low to high impedance during standby, the system maintains signal quality during active operation while reducing power dissipation during inactive periods, effectively resolving the contradiction between reliability and energy loss.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS7479799B2Output buffer with switchable output impedance

Publication Date: 2009.01.20 MARVELL ASIA PTE LTD

AI summary

An output buffer with a switchable output impedance designed for driving a terminated signal line. The buffer includes a drive circuit, and a means for switching the output impedance of the drive circuit between a first, relatively low output impedance when the output buffer is operated in a ‘normal’ mode, and a second output impedance which is greater than the first output impedance when operated in a ‘standby’ mode. By increasing the drive circuit's output impedance while in ‘standby’ mode, power dissipation due to the termination resistor is reduced. When used in a memory system, additional power savings may be realized by arranging the buffer such that the increased impedance in ‘standby’ mode shifts the signal line voltage so as to avoid the voltage range over which a line receiver's power consumption is greatest.