Switchable Termination Resistance Circuit for Low-Current Bus Signaling
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Solution Overview
Problem
Existing communication systems face challenges in managing termination resistance in transceivers to reduce reflections and power consumption, particularly under high electromagnetic interference and high common mode voltages, which complicates the design of switchable termination resistors.
Innovation Solution
A switchable termination resistance circuit with a driving circuit that uses a parallel arrangement of switches and a control circuit to dynamically provide and maintain termination resistance, utilizing a high-pass filter to manage current flow and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a termination resistance is provided continuously to reduce reflections on the communication bus, then signal quality is improved, but current consumption increases
Solution Approach 1:
The termination resistance is implemented as a dynamic switchable component rather than a fixed continuous connection. The control circuit switches the termination resistance on during transmit mode and turns it off during receive mode, allowing the system to adapt its electrical characteristics to the current operational state, thereby reducing unnecessary current consumption while maintaining signal quality when needed
Solution Approach 2:
The termination resistance is activated periodically based on the communication protocol state transitions. The control circuit uses the enable signal and timing mechanisms to turn on the termination resistance only during specific time intervals when data transmission occurs, and turns it off during receive intervals, creating a periodic activation pattern that reduces overall current consumption while maintaining signal integrity during critical periods
2Use of energy by moving object
If a switchable termination resistance circuit is implemented to reduce current consumption, then power efficiency is improved, but device complexity increases
Solution Approach 1:
The control circuit is integrated within the transceiver device, merging the termination resistance control functionality with the existing communication circuitry. The control circuit shares the enable signal input with other transceiver functions and uses integrated PMOS switches that are part of the standard CMOS process, combining multiple functions into a unified structure rather than adding separate discrete components
Solution Approach 2:
The control circuit automatically controls the termination resistance based on the enable signal state without requiring external control logic. The high-pass filter circuit self-regulates the timing of the termination resistance activation and deactivation based on the enable signal transitions, eliminating the need for additional timers or complex control sequences
3Power
If high current is provided during transmission to ensure proper signal levels, then signal strength is improved, but power consumption increases
Solution Approach 1:
The circuit provides high current through the second PMOS switch only during the brief transmission intervals when the enable signal is active, then switches to low current mode through the first PMOS switch during receive intervals. This periodic switching between high-current and low-current states ensures adequate signal strength during transmission while minimizing power consumption during reception
Solution Approach 2:
The circuit dynamically changes the current parameter by switching between two different PMOS switches with different current capabilities. The first PMOS switch provides low leakage current for power savings during receive mode, while the second PMOS switch provides high current for signal transmission, allowing the system to optimize the current parameter based on operational requirements
Data Source
AI summary
An apparatus comprising: a driving circuit; a switchable termination resistance circuit configured to selectively provide a resistance based on an output of the driving circuit; wherein the output of the driving circuit is provided by a parallel arrangement of a first branch having a first switch and a second branch having a second switch, wherein the second branch provides greater current than the first branch, and wherein the driving circuit is configured to provide, in response to an enable signal received at an input of the driving circuit, the output comprising a first current by turning on the second switch for a predetermined time period following the provision of the enable signal to cause the provision of the termination resistance, and, after said predetermined time period, turn off the second switch such that the output comprises a second current, less than the first current.