Switched-Capacitor ADC Layout for Near-Constant Common-Mode Voltage
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Solution Overview
Problem
Conventional analog-to-digital conversion methods are inefficient and ineffective due to variations in common mode voltage, which affect the accuracy and reliability of the conversion process.
Innovation Solution
The system employs an analog-to-digital converter with near-constant common mode voltage, utilizing sampling switches, double-sided and single-sided switched capacitors, and successive approximation register logic to iteratively switch capacitors between reference voltages and ground, maintaining a consistent common mode offset throughout the conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional analog-to-digital conversion methods are used, then the conversion process can be implemented with standard circuits, but the common mode voltage varies during conversion which reduces accuracy and reliability
Solution Approach 1:
The patent applies equipotentiality by maintaining a constant common mode voltage level throughout the conversion process. The circuit is designed so that both input lines share a stable reference potential, and the switched capacitor network is configured to preserve this equipotential condition during switching operations, thereby eliminating common mode voltage variations that would otherwise degrade measurement precision
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the switching states of capacitors in the DAC network during the conversion process. The capacitor switches are controlled to maintain constant common mode voltage while the digital-to-analog conversion progresses through successive approximation, allowing the system to adapt parameters (capacitor connections) to preserve voltage stability throughout conversion
2Productivity
If conventional conversion circuits are used, then the device complexity is lower, but the conversion efficiency and effectiveness are reduced due to common mode voltage variations
Solution Approach 1:
The patent applies segmentation by dividing the conversion function into separate stages: sampling switches for input signal acquisition, a DAC network with multiple switched capacitors for digital-to-analog conversion, and a comparator for decision-making. This segmented architecture allows each component to be optimized for its specific function while collectively achieving high conversion efficiency with controlled complexity
Solution Approach 2:
The patent implements multi-functionality through the switched capacitor DAC network that simultaneously performs digital-to-analog conversion and maintains constant common mode voltage. The same capacitor array serves both conversion purposes and stability maintenance, reducing the need for separate dedicated circuits and thereby improving efficiency without proportionally increasing complexity
Data Source
AI summary
Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each input line to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2x where x ranges from 0 to m−1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than VADC_fs/128+VADC_fs/256+VADC_fs/512+VADC_fs/1024 when m equals 4 and where VADC_fs is the full-scale voltage of the ADC.