Switched-Capacitor Amplifier Reset for High-Speed ADC Sampling
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Solution Overview
Problem
Conventional switched-capacitor amplifier circuits face challenges in high-speed applications due to high power consumption and the need for significant bandwidth, as well as additional recovery time required to switch from the sampling phase to the amplification phase, making them unsuitable for high-speed analog-to-digital converters with sampling frequencies greater than 250 mega samples per second.
Innovation Solution
The proposed switched-capacitor amplifier circuit employs multiple switched-capacitor networks, resistors, and reset circuits to generate sampled voltages during the sampling phase and amplify them during the amplification phase, allowing for efficient resetting and reduced power consumption, eliminating the need for significant bandwidth and unity-gain mode operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the amplifier is designed with significant bandwidth and operated in unity-gain mode during sampling phase, then the amplifier can be reset effectively, but the power consumption increases significantly
Solution Approach 1:
The circuit is divided into multiple switched-capacitor networks (first through fourth networks) that operate independently during sampling phase. Each network processes specific input signals (first input voltage VP and second input voltage VN) separately, allowing the amplifier to be reset without requiring high power consumption for unity-gain operation. The segmentation enables selective charging and discharging of capacitors based on switch states, achieving reset functionality with lower power.
Solution Approach 2:
The amplifier operates in periodic phases: sampling phase and amplification phase. During sampling phase, the amplifier is reset by charging/discharging capacitors in the switched-capacitor networks based on switch states. During amplification phase, the amplifier processes the sampled signals. This periodic operation allows the amplifier to be reset effectively without requiring continuous high power consumption, as the reset occurs only during sampling phase intervals.
2Reliability
If shorting input and output terminals during sampling phase, then the amplifier is reset, but additional recovery time is required for multi-stage high-gain amplifiers
Solution Approach 1:
The switched-capacitor networks perform preliminary charging and discharging of capacitors during sampling phase before the amplification phase begins. The capacitors are charged to specific voltages based on the input signals and switch states. This preliminary action prepares the amplifier for the upcoming amplification phase, eliminating the need for additional recovery time. The reset is achieved through the capacitor charging/discharging process rather than simple shorting, which prevents the need for configuration switching and associated recovery delays.
3Reliability
If the amplifier configuration is modified during sampling phase, then the amplifier can be reset for multi-stage high-gain operation, but the circuit complexity increases
Solution Approach 1:
The switched-capacitor networks serve multiple functions: they sample input voltages during sampling phase, reset the amplifier during sampling phase, and transfer charged voltages to the amplifier input during amplification phase. The same capacitors and switches perform both sampling and reset functions, eliminating the need for separate reset circuitry or configuration modifications. This multi-functionality reduces circuit complexity while maintaining effective reset capability for multi-stage high-gain amplifiers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces power consumption and recovery time, making the amplifier suitable for high-speed applications by ensuring the amplifier is reset during the sampling phase without modifying internal configurations, thus enabling efficient operation at high sampling frequencies.
Implementation Method 1
a switched-capacitor amplifier circuit includes multiple switches, an amplifier, and a set of capacitors, and operates by charging and discharging the set of capacitors based on states (i.e., activated or deactivated states) of the switches
Implementation Method 2
during the amplification phase, the amplifier outputs amplified versions of the sampled input voltages
Data Source
AI summary
A switched-capacitor amplifier circuit includes multiple switched-capacitor networks, an amplifier, and multiple reset circuits. The switched-capacitor networks are configured to receive respective input voltages during a sampling phase, and generate sampled voltages. During an amplification phase, the amplifier is coupled with the switched-capacitor networks, and is configured to receive the sampled voltages. The amplifier is further configured to generate output voltages. During the sampling phase, the amplifier is coupled with the reset circuits, and is further configured to receive divided voltages such that the amplifier is reset. The reset circuits are configured to receive and provide a common-mode voltage and the output voltages to the amplifier. The divided voltages are generated based on the common-mode voltage and the output voltages. Each reset circuit includes at least one of a resistor and a capacitor.