Switched-Capacitor Computing-in-Memory Circuit for Accurate ADC
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Solution Overview
Problem
Deep learning accelerators using process-in-memory technology face accuracy issues due to threshold voltage drift from PVT variations and errors caused by inconsistent analog-to-digital converters and multiply-accumulate operation units.
Innovation Solution
A computing-in-memory circuit with an analog multiply-add operation unit combining a computing element array and an analog-to-digital conversion circuit, utilizing switched-capacitors circuits for capacitance-based operations to reduce errors, where the conversion control unit dynamically couples computing elements to minimize PVT-related inaccuracies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If threshold voltage drift from PVT variations is considered, then operation accuracy decreases
Solution Approach 1:
The patent changes the operating parameter from voltage-based to capacitance-based operations. By using charge mode where the state of computing elements is represented by charge levels on capacitors rather than voltage levels, the system becomes less sensitive to PVT variations that cause threshold voltage drift, thereby maintaining operation accuracy despite environmental changes
Solution Approach 2:
The patent introduces capacitors as intermediary elements that store charge to represent computational states. These capacitors act as mediators between the computing elements and the readout circuitry, allowing the system to maintain stable charge-based representations that are less affected by threshold voltage variations compared to direct voltage-based operations
2Reliability
If inconsistent types and generation manners of ADC and MAC unit are used, then operation accuracy reduces
Solution Approach 1:
The patent merges the MAC unit and ADC into a unified charge mode system where both operations use the same charge-based representation and the same capacitor arrays. The computing elements perform MAC operations by charging/discharging capacitors, and the same capacitors directly feed into the ADC for conversion, eliminating the need for separate voltage-based MAC units and reducing inconsistency errors
Solution Approach 2:
The patent makes the capacitor arrays universal by using them for multiple purposes: they serve as both the computational elements for MAC operations and as the input sources for ADC conversion. This multi-functionality ensures that the same physical components are used throughout the signal path, guaranteeing consistency between the MAC unit and ADC
3Measurement precision
If DC errors and drift in analog circuits are present, then conversion correctness is compromised
Solution Approach 1:
The patent extracts the DC error and drift components from the signal path by using differential charge-based operations. By representing computational results as charge differences on capacitors rather than absolute voltage levels, the system eliminates DC offsets and drift that would otherwise corrupt the conversion correctness in traditional analog circuits
Solution Approach 2:
The patent employs periodic clock signals to control the charging and discharging of capacitors in the computing elements. This periodic action allows for synchronized charge transfer and enables the system to perform multiple computational cycles, with each cycle resetting and recalibrating the charge levels to maintain accuracy over time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces errors and inaccuracies by ensuring consistent capacitance-based operations, enhancing the accuracy of analog computation and digital conversion in deep learning accelerators.
Implementation Method 1
The first group of computing elements provides capacitance for analog computation in response to an input vector
Implementation Method 2
each computing element of the computing element array is based on a switched-capacitors circuit
Data Source
AI summary
A computing-in-memory circuit comprises a computing element array and an analog-to-digital conversion circuit. The computing element array is utilized for analog computation operations. The computing element array includes memory cells, a first group of computing elements, and a second group of computing elements. The first group of computing elements provides capacitance for analog computation in response to an input vector and receives data from the plurality of memory cells and the input vector. The second group of computing elements provides capacitance for quantization. Each computing element of the computing element array is based on a switched-capacitors circuit. The analog-to-digital conversion circuit includes a comparator and a conversion control unit. The comparator has a signal terminal, a reference terminal, and a comparison output terminal, wherein the first and second groups of computing elements are selectively coupled to the signal terminal and the reference terminal.