Switched-Capacitor CMFB for Baseband Op-Amp Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Common-Mode FeedBack (CMFB) circuits in operational amplifiers for baseband analog filters in RFICs consume significant power, leading to reduced battery life in wireless terminals and decreased product competitiveness due to high power consumption and output impedance degradation.
Innovation Solution
A switched-capacitor type CMFB circuit is integrated with a differential operational amplifier, utilizing a clock generator to synchronize the driving clock with the ADC sampling clock, allowing for reduced power consumption and maintaining a constant common voltage by comparing the average output voltage with a reference voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a resistor-based voltage averaging method is used in the CMFB circuit, then the common-mode voltage can be detected, but the output impedance decreases and OpAmp gain is deteriorated
Solution Approach 1:
The patent replaces the resistor-based voltage averaging method with a switched-capacitor circuit. This substitution eliminates the resistive loading effect that degraded output impedance and OpAmp gain, while still achieving accurate common-mode voltage detection through capacitive sampling and averaging mechanisms.
Solution Approach 2:
The patent changes the fundamental parameter from resistance to capacitance in the voltage averaging mechanism. By using switched capacitors instead of resistors, the circuit achieves the same voltage averaging function without the harmful side effects of resistive loading on the OpAmp output impedance and gain.
2Stability of the object's composition
If a traditional CMFB circuit is used to maintain common-mode stability, then the common-mode voltage is maintained constant, but power consumption increases occupying about 40% of each OpAmp power
Solution Approach 1:
The patent employs periodic switching of capacitors synchronized with the ADC sampling clock. This periodic action allows the CMFB circuit to achieve common-mode voltage stabilization through discrete sampling and averaging events, significantly reducing continuous power consumption compared to traditional analog CMFB circuits that require constant operation.
Solution Approach 2:
The patent substitutes the continuous analog feedback mechanism with a periodic switched-capacitor digital-style feedback approach. This substitution reduces power consumption by eliminating continuous current flow while maintaining common-mode stability through periodic measurement and correction.
3Adaptability or versatility
If a separate clock source is used for the CMFB circuit, then the switched-capacitor CMFB can operate independently, but device complexity and power consumption increase
Solution Approach 1:
The patent makes the existing ADC sampling clock serve a dual function: it drives both the ADC conversion process and the switched-capacitor CMFB circuit. This multi-functionality eliminates the need for a separate CMFB clock source, reducing device complexity and power consumption while maintaining independent operation capability through shared clock synchronization.
Data Source
AI summary
An operational amplifier circuit is provided. The operational amplifier circuit includes a differential amplifier of a cascade structure and a switched-capacitor type Common-Mode FeedBack (CMFB) circuit. The differential amplifier amplifies a difference between two input signals to output an anode output voltage and a negative output voltage. The switched-capacitor type CMFB circuit averages the anode output voltage and the negative output voltage of the differential amplifier, compares the average voltage with a reference voltage to generate a feedback signal based on a result of the comparison, and provides the feedback signal to the differential amplifier. Therefore, power consumption is reduced and a battery use time of a wireless terminal can be extended. Also, since an operational amplifier gain of each analog filter terminal is not negatively affected, a Direct Current (DC) offset is reduced, thereby improving signal quality.


