Switched-Capacitor CMFB for Double-Sampling Amplifier Stability
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Solution Overview
Problem
Conventional amplifier circuits face issues with deteriorating characteristics due to varying output common-mode voltage every half cycle, long settling time, and increased current consumption, particularly in discrete time CMFB circuits that cannot perform CMFB control at double sampling timing.
Innovation Solution
A discrete time amplifier circuit with a common-mode feedback circuit comprising two switched-capacitor circuits operating alternately every ½ cycle, allowing for double sampling timing and reduced convergence time, featuring a simple circuit configuration and low current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a discrete time CMFB circuit is used to reduce current consumption and simplify circuit configuration, then current consumption is reduced and circuit complexity is lowered, but the circuit cannot perform CMFB control at double sampling timing causing output common-mode voltage to vary every half cycle
Solution Approach 1:
The CMFB circuit is divided into two separate switched-capacitor circuits (first and second) that operate alternately at different half-cycles. This segmentation allows each circuit to be simple and low-power, while together they achieve stable double-sampling CMFB control by preventing simultaneous switching of both circuits.
Solution Approach 2:
The first and second switched-capacitor circuits are configured to switch periodically at different half-cycles of the clock signal. This periodic alternating operation enables the CMFB circuit to perform control at double sampling timing while maintaining low power consumption and simple configuration for each individual circuit.
2Reliability
If conventional CMFB control is implemented, then output common-mode voltage can be controlled, but settling time becomes long due to slow convergence to steady state
Solution Approach 1:
The CMFB circuit implements feedback control by detecting the output common-mode voltage and adjusting it through the switched-capacitor circuits. This feedback mechanism enables rapid convergence to the desired steady state by continuously correcting deviations, thereby reducing settling time while maintaining reliable voltage control.
3Productivity
If double sampling operation is implemented to achieve high data transmission speed, then productivity increases, but the amplifier settling characteristics become more difficult to maintain
Solution Approach 1:
The CMFB circuit performs preliminary action by pre-establishing stable common-mode voltage control before the amplifier needs to settle. The switched-capacitor circuits prepare the common-mode voltage in advance during the switching periods, ensuring that the amplifier can maintain good settling characteristics even at high data transmission speeds enabled by double sampling operation.
Data Source
AI summary
The present invention is intended to attain simplified circuit configuration and low current consumption in a discrete time amplifier circuit and an AD converter, to improve the convergence from the transient response state to the steady state of the amplifier circuit and to reduce noise and distortion owing to the variation in the output common-mode voltage. The discrete time amplifier circuit and the AD converter are provided with a switched-capacitor common-mode feedback (CMFB) circuit capable of detecting and feeding back the output common-mode voltage at every sampling timing in the case that the circuit operates at double sampling timing (every ½ cycle).