Switched-Capacitor Gain Stage With Dynamic Common-Mode Reference
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Solution Overview
Problem
Conventional single-ended switched-capacitor gain stages face challenges in balancing low power, high resolution, and small silicon area due to sensitivity to common-mode reference offsets, which degrade integral and differential non-linearity, leading to poor dynamic performance in analog-to-digital converters.
Innovation Solution
A non-flip-around multiplying-DAC architecture dynamically generates a reference common mode voltage using pre-charged switched capacitors, equalizing reference loading and reducing sensitivity to capacitor mismatch and offset, thereby maintaining linearity and reducing distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional single-ended switched-capacitor gain stages are used, then the circuit structure is simple and occupies small silicon area, but the circuit exhibits extreme sensitivity to common-mode reference offset which degrades integral non-linearity and differential non-linearity
Solution Approach 1:
The patent divides the reference voltage generation into separate components: a common-mode reference voltage generation circuit and a differential reference voltage generation circuit. This segmentation allows independent optimization of each circuit's function, enabling the common-mode circuit to compensate for offset errors while maintaining simple overall structure.
Solution Approach 2:
The patent introduces an intermediate common-mode reference voltage signal that acts as a mediator between the differential input signal and the output. This intermediate signal dynamically adjusts to compensate for capacitor mismatch and common-mode offset errors, improving linearity without requiring complex circuitry.
2Manufacturing precision
If the reference common mode voltage is precisely set to maintain proper operation, then linearity is improved, but any small offset in the reference common mode voltage causes redundant or missing codes which severely degrade linearity
Solution Approach 1:
The patent implements a feedback mechanism where the common-mode reference voltage is dynamically adjusted based on the differential input signal. The common-mode circuit monitors the operating conditions and automatically compensates for offset errors, making the system robust against reference voltage variations and capacitor mismatch.
Solution Approach 2:
The patent transitions from a static reference common-mode voltage to a dynamic one that changes with the input signal. The common-mode reference voltage is no longer fixed but is generated dynamically to match the instantaneous operating point, eliminating the sensitivity to fixed offset values.
3Manufacturing precision
If additional high-performance circuitry is introduced to maintain linearity, then linearity performance is improved, but the overall cost and complexity of the gain stage increases
Solution Approach 1:
The patent designs the common-mode reference voltage generation circuit to serve multiple functions: it provides the common-mode bias voltage, compensates for capacitor mismatch errors, and dynamically adjusts for common-mode offset. This multi-functionality achieves high linearity performance without requiring separate dedicated circuits for each function.
Solution Approach 2:
The patent merges the common-mode reference generation and the offset compensation functions into a single integrated circuit block. By combining these functions, the patent avoids the need for additional separate high-performance circuitry, maintaining simplicity while achieving improved linearity.
4Use of energy by moving object
If conventional switched-capacitor structures are used, then power consumption is reduced, but sensitivity to capacitor mismatch and common-mode offset degrades dynamic performance
Solution Approach 1:
The patent enables the switched-capacitor gain stage to self-correct for capacitor mismatch and common-mode offset errors through the dynamic common-mode reference voltage. The circuit uses its own operating conditions to generate the compensation signal, eliminating the need for external high-performance circuitry and maintaining low power consumption while improving dynamic performance.
Data Source
Figure 1~2(b)
Figure 3~4
Figure 5~6
AI summary
A switched-capacitor gain stage circuit (70) and method include an amplifier (71) connected to an input sampling circuit (73) with sampling switched capacitors (C1, C2) for coupling an input voltage and a first or second reference voltage to one or more central nodes during a sampling phase and for coupling the one or more central nodes (72) to an amplifier input during a gain phase, wherein a reference loading circuit uses a plurality of sampling switched capacitors (C3, C4) connected in a switching configuration to selectively couple a first reference voltage and/or a second reference voltage to the central node by pre-charging the plurality of sampling switched capacitors with the first and second reference voltages during the sampling phase, and by coupling each of the first and second reference voltages to at least one of the plurality of sampling switched capacitors when connected to the central node during the gain phase.