Switched-Capacitor Power Converter for Low Current Efficiency

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Solution Overview

Problem

Battery-operated devices spend most of their time in standby mode, leading to high standby power consumption due to low conversion efficiency of traditional linear regulators under low current load conditions, limiting battery life.

Innovation Solution

A high energy efficiency switched-capacitor power converter is designed with seven transmission gates, five capacitors, and PMOS/NMOS tubes, utilizing clock signals to minimize voltage difference and reduce power loss through charge transfer, achieving efficient power conversion with a simple structure and stable output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a linear regulator is used for power conversion, then the circuit structure is simple, but the conversion efficiency is low under low current load conditions

Engineering Contradiction:
Improvecircuit structureVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent replaces the traditional linear regulator (analog voltage control mechanism) with a switched-capacitor circuit that uses discrete switching actions and charge transfer to achieve voltage conversion. This substitution of the continuous analog control with discrete switching operations enables higher efficiency at low currents while maintaining acceptable circuit complexity through the use of standard CMOS transmission gates and capacitors.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention employs periodic clock signals to control the switching of transmission gates, creating a rhythmically repeating charge transfer process. The capacitors are charged and discharged in periodic cycles, transferring energy from input to output in discrete packets. This periodic switching action eliminates the continuous power dissipation of linear regulators and achieves efficiencies exceeding 80% even at 100 nA load currents.

Inventive Principle:
Principle #19Periodic action

2Productivity

If a DC-DC converter is used to maintain low current operation, then the power conversion capability is improved, but the power consumption of the converter itself becomes excessive

Engineering Contradiction:
Improvepower conversion capabilityVSAvoidconverter power consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The switched-capacitor circuit uses the input voltage itself to drive the switching operation and charge transfer process. The transmission gates are controlled by clock signals derived from the system's existing clock infrastructure, and the capacitors are charged directly from the input voltage without requiring additional power conversion stages. This self-service approach eliminates the need for an active power conversion mechanism that would consume excessive power at low current levels.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention extracts only the essential power conversion function from complex DC-DC converter architectures, implementing voltage conversion through simple capacitive charge transfer. By removing unnecessary conversion stages, control circuits, and active components, the design achieves power conversion capability with minimal overhead power consumption, suitable for ultra-low current applications.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of energy

If the voltage difference between supply voltage and output voltage is reduced, then the conversion efficiency of linear regulator is improved, but the voltage regulation flexibility is limited

Engineering Contradiction:
Improveconversion efficiencyVSAvoidvoltage regulation flexibility
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The switched-capacitor circuit dynamically adjusts the effective capacitance ratio and switching frequency to accommodate different input-output voltage combinations. By changing the clock frequency and capacitor configuration, the circuit can efficiently convert between widely different voltage levels (e.g., 1.8V to 0.9V, or 3V to 1.8V) without being constrained by a fixed voltage difference, achieving both high efficiency and voltage regulation flexibility.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes key operating parameters such as switching frequency, capacitor charge/discharge cycles, and transmission gate timing to optimize efficiency across different voltage conversion ratios. By adjusting these parameters, the circuit maintains high conversion efficiency (>80%) while adapting to various supply and output voltage requirements, overcoming the flexibility limitation of linear regulators.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The converter achieves conversion efficiency of at least 80% at 100 nA load current, reducing power consumption and extending battery life with low bias current, low temperature coefficient, and wide drive current range.

Implementation Method 1

converts a stable input voltage of 3V into an output voltage of 1V by means of charge transfer

Methodology Applied
Scientific EffectCharge transfer: Electrical Accumulator

Data Source

PatentUS11290009B2High energy efficiency switched-capacitor power converter
Publication Date: 2022.03.29 SOUTHEAST UNIV
  • US11290009B2 patent drawing
  • US11290009B2 patent drawing

AI summary

A high energy efficiency switched-capacitor power converter includes the transmission gates T1-T7, the capacitors C1-C4, the load capacitor CL, and resistors, PMOS tubes and NMOS tubes. The power converter converts a stable input voltage of 3V into an output voltage of 1V by means of charge transfer. In the state of timing sequence 1, the on-chip capacitor C1, the capacitor C2 and the load capacitor CL are charged in series. In the state of timing sequence 2, the capacitor C1 and the capacitor C2 are connected in parallel to the capacitor CL to supplement the charge loss due to load for the capacitor CL. When the establishment is completed, the voltages across the capacitor C1, the capacitor C2, and the capacitor CL are basically the same. At this time, the voltage drop across the switch tube approximates 0 V during the charge transfer process.