Switched-Capacitor DAC Circuit for Low-Power Fast Charging
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Solution Overview
Problem
Digital to analogue converter circuits using switched capacitor resistive elements face significant power consumption issues due to current flow between data voltage sources, especially when the output charging time is short and resistor values are low.
Innovation Solution
The use of capacitor circuits that can operate in either a voltage divider mode or a resistor mode, depending on the digital data, to reduce current flow and power consumption without degrading the output resistance, employing switched capacitor resistor circuits with multiple switches controlled by clock inputs to selectively couple binary voltage levels to the output load.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If resistor values are reduced to achieve short output charging time, then productivity is improved, but power consumption increases significantly
Solution Approach 1:
The patent applies dynamics by making the resistor values time-variant through switched capacitor circuits. The equivalent resistance is dynamically adjusted during the charging process, allowing low resistance initially for fast charging and high resistance subsequently to minimize steady-state current and power consumption.
Solution Approach 2:
The patent employs periodic action through clocked switched capacitor circuits that operate in cycles. The switches are controlled by clock signals to periodically transfer charge between capacitors, creating time-variant resistance that enables fast initial charging followed by reduced current flow.
2Device complexity
If conventional switched capacitor resistive elements are used, then device complexity is reduced, but power consumption becomes very significant
Solution Approach 1:
The patent enhances conventional switched capacitor circuits by adding control logic that dynamically adjusts the switching patterns based on the charging state. This dynamic control enables the circuit to transition from a simple resistive mode to a power-saving mode automatically, maintaining low complexity while reducing power consumption.
Solution Approach 2:
The patent implements feedback mechanisms where the charging progress is monitored and used to control the switching of capacitor circuits. This feedback enables the system to automatically adjust its operation to minimize power consumption while ensuring complete charging of the capacitive load.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces power consumption by minimizing current flow between data voltage sources while maintaining the ability to charge a load capacitor efficiently, with a peak current reduction factor of 4 and average current reduction factor of 4, leading to substantial power savings.
Implementation Method 1
A capacitor is connected between the junctions between switches of the two branches. The switches are operated cyclically to periodically charge and discharge the capacitor.
Implementation Method 2
the equivalent circuit for the switched capacitor circuit is simply a resistor, with a resistance which depends on the capacitance and operating frequency of the circuit.
Data Source
AI summary
In a digital to analogue converter, a plurality of digital inputs are used to select one of first and second binary voltage levels as binary inputs (10) to the converter. A capacitor circuit (C, 2C, . . . , 32C) is associated with each input, and these are controlled to output an effective voltage to an output load comprising the first binary voltage level, the second binary voltage level or an average of the first and second binary voltage levels in dependence on the bits of the digital input word. The plurality of capacitor circuits can be operated in either a voltage divider mode (to provide an average output) or a resistor mode depending on the value of the digital data. Operation of the capacitor circuits in this way can result in a reduction in the currents flowing and can therefore reduce the power consumption.