Switched-Capacitor DAC Layout for Capacitance Mismatch Reduction

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Solution Overview

Problem

High-resolution Digital-to-Analog Converters (DACs) and Analog-to-Digital Converters (ADCs) face accuracy limitations due to capacitance mismatch between capacitors, which restricts resolution and increases error, especially in higher resolution applications, requiring larger capacitors that increase implementation area.

Innovation Solution

A digital-to-analog converter with a controller that generates specific switch cycles to couple ground voltage and reference voltage to capacitors, ensuring an even number of switch sequences for each input value, reducing errors caused by capacitance mismatch through a switch network that alternates connections between capacitors to minimize charge imbalance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If larger capacitors are used to reduce capacitance mismatch error, then manufacturing precision is improved, but area of stationary object increases

Engineering Contradiction:
Improvecapacitance mismatch errorVSAvoidimplementation area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent changes the operating parameters of the capacitors by implementing a switching scheme that alternates between different connection configurations. The controller switches capacitors between connected and disconnected states, and between different terminal connections, to dynamically compensate for capacitance mismatch without requiring larger capacitor physical dimensions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic switching control where the controller actively manages capacitor connections based on detected mismatch conditions. The switching mechanism allows the system to adapt its configuration in real-time, transitioning between different operational states to optimize performance and compensate for manufacturing variations

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If more capacitors are used to improve DAC resolution, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
ImproveDAC resolutionVSAvoidcapacitor quantity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent achieves higher effective resolution by changing the operational parameters through switching sequences rather than simply increasing capacitor quantity. The switching scheme creates multiple effective states from a limited number of physical capacitors, enabling fine-grained control and higher resolution output

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If switching scheme is implemented to compensate capacitor mismatch, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvecapacitance mismatch compensationVSAvoidswitching mechanism
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The switching mechanism serves multiple functions simultaneously: it compensates for capacitance mismatch, enables resolution enhancement, and provides flexible configuration control. The same switching network performs error compensation and normal operational switching, reducing the need for separate dedicated components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces errors due to capacitance mismatch, allowing for higher accuracy without the need for larger capacitors or amplifiers, thus maintaining or improving resolution while minimizing implementation area and complexity.

Implementation Method 1

High accuracy for example 16 bit or more Digital-to-Analog Converter (DAC) and Analog-to-Digital Converters (ADC) may include a charge recycling scheme using capacitors

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentEP3657682B1Digital to analog and analog to digital converter
Publication Date: 2021.07.07 NXP BV
  • EP3657682B1 patent drawingFigure 1~2
  • EP3657682B1 patent drawingFigure 3A~3F
  • EP3657682B1 patent drawingFigure 4A~5D

AI summary

A digital-to-analog converter (DAC) is described having a digital input, an analogue output, and two capacitors. The DAC has a controller. The controller is configured to generate a switching sequence including at least two switch cycles dependent on the input value received on the digital input. If the input value corresponds to an odd number, in a first switch cycle during a switch cycle first phase, the controller switchably couples a reference voltage to a first terminal and a ground voltage to a second terminal of one of the two capacitors, and switchably couples a ground voltage to a first terminal and the reference voltage to a second terminal of the other of the two capacitors. During a switch cycle second phase, the controller switchably couples a ground voltage to the first terminal and the analogue output to the second terminal of both capacitors.