Switched-Capacitor Analog Circuit for DC Offset Elimination

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Solution Overview

Problem

Analog signal processing circuits in sensor applications face challenges in effectively eliminating DC offset voltage and low-frequency noise, which degrade sensor accuracy and performance due to factors like operational amplifier gain limitations and semiconductor device mismatches.

Innovation Solution

The proposed solution involves an analog signal processing circuit with a front-stage processing module and switched capacitor circuits that operate in synchronized phases to integrate and eliminate DC offset voltages, using bandgap reference modules and buffer modules to generate high-frequency square wave signals for effective compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional analog signal processing circuits are used, then the circuit structure is simple, but DC offset voltage and low-frequency noise cannot be effectively eliminated, degrading sensor accuracy

Engineering Contradiction:
Improvesensor accuracyVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The analog signal processing circuit is divided into multiple processing stages: a first processing stage that performs initial signal processing, and a second processing stage that performs further processing including DC offset elimination. This segmentation allows each stage to be optimized for specific functions, with the second stage specifically targeting DC offset and low-frequency noise removal through switched capacitor circuits and correlation double sampling, thereby improving overall measurement precision without requiring complete redesign of the entire circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Switched capacitor circuits are introduced as intermediary elements between the first and second processing stages. These circuits use sampling capacitors and switching elements to capture and process signals at specific time points, enabling the elimination of DC offset voltage through correlation double sampling. The intermediary switched capacitor stage acts as a bridge that transforms the signal in a way that facilitates subsequent DC offset removal while maintaining circuit manageability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If additional circuits are added to eliminate DC offset voltage, then measurement precision improves, but device complexity increases

Engineering Contradiction:
ImproveDC offset elimination accuracyVSAvoidcircuit components
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit combines multiple functions into integrated processing stages. The second processing stage merges signal amplification, DC offset elimination, and low-frequency noise filtering into a unified structure. Switched capacitor circuits are combined with correlation double sampling mechanisms, and bandgap reference modules are integrated to provide stable voltage references. This merging approach achieves comprehensive DC offset elimination while avoiding the need for separate independent circuits for each function, thereby controlling overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The circuit employs periodic switching actions through clock signals to control the switched capacitor circuits. The switching elements operate in periodic cycles, alternately connecting and disconnecting capacitors to perform correlation double sampling. This periodic action enables the systematic elimination of DC offset voltage by processing signals at different time points and combining them, achieving precise DC offset removal through time-domain modulation rather than requiring complex continuous-time circuits.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If switched capacitor circuits with synchronous control are used, then DC offset voltage is completely eliminated, but control signal requirements increase

Engineering Contradiction:
ImproveDC offset elimination completenessVSAvoidcontrol signal generation
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit incorporates feedback mechanisms where the output of the second processing stage is fed back to influence subsequent processing. Correlation double sampling uses feedback from previously sampled signals to adjust and eliminate DC offset components. The bandgap reference modules provide feedback-stabilized voltage references that adapt to temperature and supply variations. This feedback approach enables complete DC offset elimination through iterative correction while using standardized control signal generation, avoiding the need for overly complex control architectures.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20230188105A1Analog signal processing circuit and method for eliminating DC offset voltage
Publication Date: 2023.06.15 SILERGY SEMICON TECH (HANGZHOU) CO LTD
  • US20230188105A1 patent drawing
  • US20230188105A1 patent drawing
  • US20230188105A1 patent drawing

AI summary

An analog signal processing circuit can include a front-stage processing module configured to process an analog signal to generate a first differential signal; at least one switched capacitor circuit, coupled with the front-stage processing module to receive the first differential signal, and configured to integrate or sample and hold the first differential signal to generate a second differential signal; and where the front-stage processing module and the at least one switched capacitor circuit receive synchronous control signals, the front-stage processing module chops the analog signal according to the control signals, and the at least one switched capacitor circuit is in different operating modes at a first phase and a second phase of an operation cycle of the control signals, in order to eliminate DC offset voltages of the front-stage processing module and the at least one switched capacitor circuit.