Switched Capacitor Differentiator Parasitic Compensation
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Solution Overview
Problem
Switched capacitor differentiators face issues due to parasitic capacitances and capacitor mismatch, which complicate production and increase costs, affecting their performance.
Innovation Solution
A switched capacitor differentiator with a specific switching structure that alternately couples capacitors in three configurations, effectively compensating for operational amplifier offset and parasitic capacitances, allowing the use of capacitors with substantial bottom plate parasitic capacitances or mismatch without degrading performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional capacitors are used in switched capacitor differentiators, then the circuit can store input voltage samples, but parasitic capacitances and capacitor mismatch degrade performance and require elaborate component selection
Solution Approach 1:
The patent converts the harmful effect of parasitic capacitances and capacitor mismatch into a beneficial outcome by using a correlated double sampling technique. The parasitic capacitances are intentionally utilized to store offset voltages during a first sampling phase, which are then subtracted during a second sampling phase, thereby eliminating their harmful impact on differential signal accuracy.
Solution Approach 2:
The patent segments the sampling process into two distinct phases: a first sampling phase where offset voltages are captured, and a second sampling phase where the actual differential signal is measured. This temporal segmentation allows the circuit to separate and eliminate offset errors from the signal measurement, improving performance without requiring precise component matching.
2Ease of operation
If multiple capacitors are used to store input signals, then the differentiator can function, but capacitor mismatch and operational amplifier offset induce drawbacks
Solution Approach 1:
The patent implements a feedback mechanism where the offset voltage captured during the first sampling phase is fed back and subtracted during the second sampling phase. This feedback approach automatically compensates for operational amplifier offset and capacitor mismatch effects, maintaining signal accuracy without requiring manual calibration or precise component selection.
Solution Approach 2:
The patent performs a preliminary sampling action to capture offset voltages before the actual signal measurement. By pre-capturing the offset information in the first sampling phase, the circuit eliminates the need for precise component matching during the second sampling phase, thereby improving measurement precision while maintaining ease of operation.
3Reliability
If elaborate component selection is performed to reduce parasitic capacitances and mismatch, then performance improves, but production and manufacturing become complicated and cost intensive
Solution Approach 1:
The patent eliminates the need for elaborate component selection by converting the harmful parasitic capacitances into useful storage elements for offset voltages. This approach allows the use of standard, easily manufacturable capacitors while achieving high performance through the correlated double sampling technique, thereby simplifying production and reducing costs.
Solution Approach 2:
The patent enables the use of inexpensive, standard capacitors with significant parasitic capacitances by compensating for their deficiencies through the sampling technique. Instead of requiring expensive, precisely matched capacitors, the circuit uses readily available components and eliminates their drawbacks through temporal processing, making manufacturing simpler and more cost-effective.
Data Source
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AI summary
The switched capacitor differentiator comprises : - an operational amplifier (12) having an output (18), an inverting input (14) and a non-inverting input (16), - an input port (34) and a reference voltage (20), - a first capacitor (30) and a second capacitor (32), and - a switching structure (40) comprising switches (41, 42, 43, 44, 45, 46) to alternately couple at least one of the first and the second capacitors with the operational amplifier, the input port and with the reference voltage in at least three different switch configurations, wherein: - in a first switch configuration the first capacitor is coupled between the input port and the reference voltage, - in a second switch configuration the second capacitor is coupled between the input port and a node connected to the operational amplifier output and inverting input, and - in a third switch configuration the first and second capacitors are connected in series between the inverting input and the operational amplifier output.