Switched-Capacitor Doherty Amplifier for Deep Power Back-Off
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Solution Overview
Problem
Modern wireless communication systems face efficiency degradation due to high peak-to-average power ratio (PAPR) in digital transmitters, which limits the enhancement of power amplifier efficiency beyond typical 6 dB power-back-off.
Innovation Solution
The proposed solution combines a voltage-mode Doherty amplifier with a house-of-cards (HoC) power amplifier architecture, utilizing M-stacked HoC amplifier cells in a switched-capacitor power amplifier topology to boost efficiency in deep power back-off.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power amplifiers operate close to the saturation point to maximize efficiency, then efficiency is improved, but the amplifier cannot handle high peak-to-average power ratio signals without degrading system efficiency
Solution Approach 1:
The power amplifier is divided into multiple amplifier cells that can be independently controlled. Each cell can be switched on or off based on the signal power level, allowing the amplifier to maintain high efficiency at back-off power levels while still handling high peak power signals. The segmented structure enables selective activation of amplifier cells to match the instantaneous power requirements.
Solution Approach 2:
The amplifier employs dynamic control of amplifier cells through switching mechanisms that adjust the number of active cells based on the input signal power level. This dynamic adaptation allows the system to transition between different operating states (linear region and saturation region) to optimize efficiency across varying power levels while maintaining the ability to handle high PAPR signals.
2Adaptability or versatility
If digital transmitters operate in deep power back-off to handle high PAPR signals, then signal handling capability is improved, but system efficiency degrades considerably
Solution Approach 1:
The transmitter power amplifier stage is segmented into multiple controllable amplifier cells that can be activated in different combinations. This segmentation allows the system to operate in deep power back-off when needed while maintaining high efficiency by activating only the necessary number of amplifier cells, rather than forcing the entire system to operate inefficiently at reduced power levels.
Solution Approach 2:
The system dynamically changes the operating parameters of the amplifier cells, including the number of active cells and their individual power levels, to optimize efficiency at different back-off conditions. By adjusting these parameters based on the instantaneous signal requirements, the system can handle high PAPR signals in deep back-off while minimizing efficiency degradation.
3Adaptability or versatility
If conventional Doherty power amplifier topology is used, then handling of large modulation and RF bandwidth is improved, but efficiency enhancement beyond typical 6 dB power-back-off is not achieved
Solution Approach 1:
The Doherty amplifier architecture is enhanced by segmenting the main and peaking amplifiers into multiple controllable cells. This segmentation allows for finer control over the power distribution and impedance transformation across different back-off levels, enabling efficiency enhancement beyond the conventional 6 dB limit while preserving the broad bandwidth and modulation handling capabilities of the original Doherty topology.
Solution Approach 2:
The enhanced Doherty amplifier employs dynamic control mechanisms that adjust the operating states of multiple amplifier cells based on the instantaneous power level and signal characteristics. This dynamic adaptation allows the system to maintain optimal efficiency across a wider range of back-off levels (beyond 6 dB) while preserving the inherent broadband and high-modulation-capability features of the Doherty architecture.
Data Source
AI summary
The present disclosure relates to an amplifier circuit comprising a main amplifier circuit comprising a plurality of first switched-capacitor, SC, house-of-cards, HoC, amplifier cells coupled in parallel between an input and an output of the main amplifier circuit, at least one peak amplifier circuit comprising a plurality of second SC HoC amplifier cells coupled in parallel between an input and an output of the peak amplifier circuit, wherein the output of the main amplifier circuit and the output of the peak amplifier circuit are coupled to a common load.