Switched Capacitor Digital Step Attenuator for RF Receivers
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Solution Overview
Problem
Digital step attenuators (DSAs) in RF receivers face challenges in supporting a wide dynamic range of analog input signals, leading to high noise figures and reduced bandwidth, making them unsuitable for wideband and multiband applications due to the need for large variations in secondary resistors and increased parasitic capacitances.
Innovation Solution
The integration of a switched capacitor-based DSA with a serial capacitor and a sampling capacitor, decoupling the capacitors determining noise spectral density and bandwidth, allowing for independent reduction of noise figure without compromising bandwidth, and minimizing variations in secondary resistors to maintain controllable inductive peaking across attenuation settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a DSA supports a large range of attenuations to handle high dynamic range of analog input signals, then the reliability of RF receiver components is improved, but the noise figure increases making integration difficult
Solution Approach 1:
The DSA is divided into multiple attenuation stages (first stage with switches S1-S4 and resistors R1-R4, second stage with switches S5-S8 and resistors R5-R8) that can be independently controlled. This segmentation allows the total attenuation range to be distributed across stages, reducing the attenuation burden on each individual stage and thereby reducing the noise figure contribution from each stage while maintaining the overall large attenuation range capability.
2Adaptability or versatility
If large variations in secondary resistors are used to achieve wide dynamic range attenuation, then the attenuation range is improved, but the parasitic capacitances increase reducing bandwidth suitability
Solution Approach 1:
The patent changes the resistor value parameters to smaller values (R1-R4: 50-200 ohms, R5-R8: 25-100 ohms) compared to conventional designs. This parameter change reduces the parasitic capacitances associated with the resistors and switches, thereby extending the usable bandwidth while maintaining the required attenuation range through the multi-stage architecture.
Solution Approach 2:
By segmenting the attenuation function into multiple stages with smaller resistor variations per stage, the maximum resistor value variation in any single stage is reduced. This segmentation approach minimizes the parasitic capacitance effects that would otherwise result from large resistor variations in a single-stage design, enabling wideband operation.
3Ease of manufacture
If the DSA is integrated in the RF receiver to reduce board area and cost, then the manufacturing efficiency is improved, but the noise figure degradation with attenuation changes increases
Solution Approach 1:
The multi-stage DSA architecture with independent control of each stage allows for optimized noise performance across the full attenuation range. Each stage contributes a smaller portion to the total attenuation, reducing the noise figure degradation that would occur in a single-stage design over the same attenuation range, while the integrated implementation maintains compact form factor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a lower noise figure, reduced noise figure degradation with attenuation changes, and improved bandwidth controllability, making the DSA more suitable for wideband and multiband RF receiver applications.
Implementation Method 1
The DSA includes a serial capacitor coupled to the input driver. The DSA also includes a sampling capacitor coupled to the ADC.
Data Source
AI summary
The disclosure provides an RF receiver. The RF receiver includes an input driver. The input driver receives a coarse signal, and generates an input signal. A digital step attenuator (DSA) is coupled to the input driver and receives the input signal. An analog to digital converter (ADC) is coupled to the DSA. The DSA includes a serial capacitor coupled to the input driver. The DSA also includes a sampling capacitor coupled to the ADC.