Multi-Stage Switched Capacitor Timing With Hold-Phase Feedback
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Solution Overview
Problem
Conventional zero-crossing-based or comparator-based switched capacitor circuits lack operational flexibility due to fixed time lengths for sample and hold phases, leading to errors from manufacturing variations, voltage, and temperature changes, which affect the stability of output voltage and sampled voltage accuracy.
Innovation Solution
A switched capacitor circuit design with multiple operational stages that generate detection signals to control phase transitions based on voltage equality with a reference, allowing flexible operation independent of a fixed system clock, ensuring each stage completes its phases adequately.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the sample phase and hold phase have fixed time lengths controlled by system clock, then the circuit operation is simple and regular, but the output voltage may not become stable before the end of hold phase, resulting in sampling errors
Solution Approach 1:
The patent implements a feedback mechanism where the completion of hold phase in one operational stage triggers the start of sample phase in the next stage. The control circuit monitors the hold phase completion signal and uses it to coordinate phase transitions across multiple stages, ensuring that sampling begins only after the output voltage has stabilized. This feedback-based coordination eliminates the need for fixed time lengths while maintaining reliable sampling accuracy.
Solution Approach 2:
The patent transitions from static fixed-time phase control to dynamic adaptive phase control. Instead of using predetermined fixed time lengths for sample and hold phases, the circuit dynamically adjusts phase durations based on actual voltage stabilization conditions. The hold phase continues until the output voltage reaches stability criteria, and this dynamic timing is communicated to coordinate the next stage's sample phase, thereby adapting to varying circuit conditions without requiring complex external control.
2Reliability
If the sample phase and hold phase time lengths are designed based on nominal conditions, then the circuit design is straightforward, but manufacturing process, voltage and temperature variations cause the phases to be shorter than required, leading to operational errors
Solution Approach 1:
The patent enables the circuit to self-adjust and self-regulate based on actual operating conditions. Each operational stage monitors its own output voltage stabilization and generates completion signals that automatically coordinate the timing of adjacent stages. This self-service mechanism allows the circuit to adapt to manufacturing variations, voltage fluctuations, and temperature changes without requiring external recalibration or complex environmental sensing, thereby maintaining reliable operation across diverse conditions.
Solution Approach 2:
The patent allows phase durations to change dynamically based on actual voltage stabilization characteristics rather than maintaining fixed nominal values. The control circuit adjusts the effective duration of hold and sample phases according to real-time circuit behavior, which varies with temperature, voltage, and manufacturing tolerances. This parameter adaptation ensures that phases are always sufficiently long for stable operation regardless of environmental conditions.
3Measurement precision
If multiple operational stages operate with fixed phase timing, then the circuit structure is simple, but the output voltage stability cannot be ensured, affecting the accuracy of sampled voltage in subsequent stages
Solution Approach 1:
The patent implements preliminary coordination where the control circuit prepares and synchronizes phase transitions across multiple stages in advance. When one stage completes its hold phase, the control circuit proactively initiates the sample phase in the next stage, ensuring that sampling begins at the optimal moment when voltage stability is achieved. This preliminary coordination eliminates timing uncertainties and ensures high measurement precision without requiring excessive phase duration.
Data Source
AI summary
A multi-stage switched capacitor circuit and an operation method thereof are provided. The multi-stage switched capacitor circuit includes a first operational stage, a second operational stage and a third operational stage that are serially connected in order. Each operational stage operates in a sample phase or a hold phase and generates a detection signal indicating an end of the hold phase. The operation method of the multi-stage switched capacitor circuit includes: controlling the second operational stage to operate in the hold phase when the detection signal of the first operational stage indicates the end of the hold phase of the first operational stage, and the detection signal of the third operational stage indicates the end of the hold phase of the third operational stage.