Switched-Capacitor Reference Circuit With Level-Crossing Sampling
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Solution Overview
Problem
Existing sampled-data analog circuits, such as switched-capacitor filters and delta-sigma modulators, face challenges in achieving accurate integration and low power consumption due to the difficulty in maintaining operational amplifiers with high open-loop gain, fast settling times, and large output swing, especially under low power supply voltages and device gain limitations.
Innovation Solution
The implementation of zero-crossing detectors in switched-capacitor circuits to generate level-crossing detection signals, which control sampling switches and voltage reference circuits, allowing for reduced power consumption without degrading noise performance or speed, by accurately sampling the output voltage at the instant it crosses a predetermined level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If operational amplifiers are used to maintain high open-loop gain and fast settling times for accurate integration, then measurement precision is improved, but power consumption increases and device complexity increases
Solution Approach 1:
The patent applies periodic action by using clocked switching to activate the operational amplifier only during specific phases (sampling phase and transfer phase) rather than continuously. The switches S11-S14 are controlled by non-overlapping clock phases to periodically connect the operational amplifier to the integrating capacitor CI1, reducing power consumption while maintaining integration accuracy during active periods
Solution Approach 2:
The patent implements dynamics by transitioning from a static always-on operational amplifier configuration to a dynamic switched-capacitor configuration. The operational amplifier's connection to the integrating capacitor is dynamically controlled through switches S12 and S14 that are closed during the transfer phase and opened during the sampling phase, allowing the circuit to adapt its power consumption based on operational requirements
2Measurement precision
If operational amplifiers are designed for large output swing to achieve high dynamic range, then measurement precision is improved, but device complexity increases and ease of manufacture worsens
Solution Approach 1:
The patent applies segmentation by dividing the integration function into discrete time segments using switches S11-S14 controlled by clock phases. The operational amplifier operates in distinct segments (sampling segment with switches S11-S13 closed, transfer segment with switches S12-S14 closed), simplifying the design requirements compared to continuous operation and making the circuit more manufacturable while maintaining dynamic range
Solution Approach 2:
The patent introduces switching elements S11-S14 as intermediaries between the operational amplifier and the capacitors. These intermediary switches enable the operational amplifier to achieve large output swing during the transfer phase when connected to the integrating capacitor, while reducing the continuous load requirements that would otherwise complicate the design and manufacturing
3Measurement precision
If voltage reference circuits operate constantly to provide stable reference voltages, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The voltage reference circuit VREF is activated periodically through switch S23 that is controlled by the second clock phase. The reference voltage is sampled onto capacitor CS2 during the transfer phase when S23 is closed, and then held during the sampling phase, providing stable reference voltage only when needed rather than maintaining continuous operation, thus reducing power consumption while preserving measurement precision
Data Source
AI summary
A switched capacitor circuit includes a first level-crossing detector to generate a level-crossing detection signal when an input signal crosses a first predetermined level. A first waveform generator generates a first predetermined waveform and a second waveform generator generates a second predetermined waveform. A second level-crossing detector generates a second level-crossing detection signal when said second predetermined waveform crosses a voltage reference level a second time. A second switch is coupled to the second level-crossing detector, and a third switch is coupled to the first level-crossing detector. The second switch turns OFF when the second level-crossing detection signal indicates the second predetermined waveform crossed the voltage reference level a second time. The third switch turns OFF when the first level-crossing detection signal indicates the input signal crossed the first predetermined level.