Comparator-Based Switched-Capacitor Circuit for Better Linearity
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Solution Overview
Problem
Conventional comparator-based switched-capacitor (SC) circuits suffer from decreased linearity due to the dependency of the current source's output current on the output voltage, affecting the circuit's performance.
Innovation Solution
The proposed comparator-based SC circuit incorporates a more complex switch-capacitor network with multiple capacitors and switches, along with an ADC and decoder, to control the output signals within a target range, thereby improving linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple current source is used in the comparator-based SC circuit, then the circuit complexity is low, but the linearity deteriorates due to output current dependency on output voltage
Solution Approach 1:
The current source is segmented into multiple parallel current sources, each controlled by a separate switch. This segmentation allows independent control of each current source's output current, enabling the output current to be made independent of the output voltage and thereby improving linearity.
Solution Approach 2:
The circuit transitions from a static current source to a dynamic switched-capacitor configuration where switches are controlled by clock signals. This dynamic operation allows the current source to deliver precise charge packets independent of voltage variations, resolving the linearity issue while maintaining practical circuit complexity.
2Manufacturing precision
If multiple capacitors and switches are added to improve linearity, then the linearity improves, but the device complexity increases
Solution Approach 1:
The multiple capacitors and switches are designed to perform multiple functions: charge storage, charge transfer, and output current control. By making these components multi-functional, the circuit achieves improved linearity without adding excessive complexity, as each component serves several purposes within the SC circuit architecture.
Solution Approach 2:
The circuit uses parameter changes in the form of clock signal phases to control switch timing and capacitor charging/discharging. By changing the temporal parameters (clock phases) rather than adding complex control logic, the circuit achieves precise current control and improved linearity with minimal increase in overall complexity.
Data Source
AI summary
A comparator-based switched-capacitor circuit has a first input terminal, a second input terminal, a first output terminal, and a second output terminal, and includes an analog-to-digital converter (ADC), a decoder, and a switch-capacitor network. The ADC is coupled to the first input terminal and the second input terminal and includes a plurality of comparators. The decoder is coupled to the ADC. The switch-capacitor network includes a comparator, a first current source, a second current source, a plurality of switches, and a plurality of capacitors. The first current source is coupled to the comparator and the first output terminal. The second current source is coupled to the comparator and the second output terminal. The voltage of the first output terminal and the voltage of the second output terminal do not exceed a target range.