Switched-Capacitor Integrator Amplifier for Low-Noise Current Reuse
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Solution Overview
Problem
Conventional amplifiers face challenges in achieving a balance between current consumption and transconductance while maintaining low noise performance, particularly in sampling circuits where they are the dominant source of noise.
Innovation Solution
The amplifier concept reuses supply current in multiple differential transistor pairs, forming a symmetric structure with complementary transistor types and multiple stages, allowing for distinct common mode voltages at each input pair, which reduces noise contribution while maintaining transconductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional amplifier concepts are used to provide sufficient transconductance, then the transconductance requirement is met, but current consumption increases or noise performance deteriorates
Solution Approach 1:
The amplifier is divided into multiple differential stages (first, second, third, and fourth stages) with distinct functions. The first stage provides high transconductance with low noise, while subsequent stages provide gain and buffering. This segmentation allows each stage to be optimized for its specific function, achieving low noise performance without requiring excessive current consumption in a single stage.
Solution Approach 2:
The patent transitions from a single-stage amplifier to a multi-stage architecture, adding the dimension of signal processing stages. This allows the system to achieve the required transconductance through the cumulative effect of multiple stages rather than relying on a single high-current stage, thereby reducing overall current consumption while maintaining noise performance.
2Reliability
If conventional amplifier concepts are used to provide sufficient transconductance, then the transconductance requirement is met, but device speed is limited
Solution Approach 1:
The amplifier is divided into multiple differential stages (first, second, third, and fourth stages) with distinct functions. The first stage provides high transconductance with low noise, while subsequent stages provide gain and buffering. This segmentation allows each stage to be optimized for its specific function, achieving low noise performance without requiring excessive current consumption in a single stage.
Solution Approach 2:
The patent transitions from a single-stage amplifier to a multi-stage architecture, adding the dimension of signal processing stages. This allows the system to achieve the required transconductance through the cumulative effect of multiple stages rather than relying on a single high-current stage, thereby reducing overall current consumption while maintaining noise performance.
3Reliability
If multiple differential stages are formed with symmetric structure, then noise contribution is reduced, but device complexity increases
Solution Approach 1:
While the overall amplifier has a symmetric multi-stage structure for noise reduction, the patent introduces asymmetric elements within specific stages. For example, the first differential stage uses transistors with different aspect ratios to optimize transconductance, and the second stage uses different transistor configurations for gain. This controlled asymmetry allows noise reduction through symmetry while maintaining design flexibility and avoiding excessive complexity.
Solution Approach 2:
The patent employs universal building blocks that can be replicated across multiple stages. The differential pair configuration, current mirror loads, and biasing circuits are reused throughout the amplifier structure. This modular approach reduces design complexity by providing a template that can be instantiated multiple times, achieving noise reduction through symmetry without proportionally increasing overall complexity.
Data Source
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AI summary
An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection coupled to a drain terminal to a respective one of the transistors of the first differential stage. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type compared to the transistor pair of the first differential stage, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second complementary differential stage are symmetrically connected to the transistors of the second differential stage such that respective first, second, third and fourth current paths are formed. A pair of output terminals is coupled to the first and the second current path. Gate terminals of the transistors of each of the stages are coupled to a respective pair of input terminals.