Switched-Capacitor Reference Current for Wide-Range PLL Stability

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Solution Overview

Problem

Generating a precise reference current is challenging in phase-locked loops (PLLs), particularly for wide output frequency ranges, leading to variability in stability and bandwidth due to process and temperature variations, and existing solutions either increase power consumption or compromise on jitter and design complexity.

Innovation Solution

A type-II charge pump phase-locked loop (CP-PLL) with a reference current generator that uses the oscillator output to control a switched capacitor network, providing a stable reference current that adjusts linearly with frequency, reducing supply sensitivity and maintaining damping factor and natural frequency constancy across a wide range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a traditional reference current generator is used, then the circuit is simple, but the reference current varies considerably due to process and temperature variation

Engineering Contradiction:
Improvereference current stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses feedback by deriving the reference current from the VCO output frequency through a divider and switched-capacitor network. The reference current automatically adjusts based on the actual operating frequency, creating a closed-loop system that compensates for process and temperature variations, thereby improving reference current stability without requiring complex external regulation circuits.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The reference current generator uses the VCO's own output to generate and regulate the reference current. The system self-adjusts by using the divided VCO frequency to control the switched-capacitor network, eliminating the need for external precision current sources or complex temperature compensation circuits, thus achieving self-regulation with minimal additional complexity.

Inventive Principle:
Principle #25Self-service

2Adaptability or versatility

If the reference current is adjusted for wide frequency range, then the frequency adaptability is improved, but the linearity and precision of current scaling becomes challenging

Engineering Contradiction:
Improvefrequency range adaptabilityVSAvoidcurrent scaling linearity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic reference current scaling by using the actual VCO output frequency to control the switched-capacitor network. Instead of fixed resistive dividers, the system dynamically adjusts the reference current based on the operating frequency, ensuring linear and precise scaling across a wide frequency range (e.g., 100 MHz to 10 GHz) while maintaining accuracy despite process variations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operating parameters of the reference current generator by using the divided VCO frequency as a control signal. The switched-capacitor network changes its effective capacitance based on the frequency-dependent control signals, enabling the reference current to scale linearly with frequency while maintaining precision across wide frequency ranges without requiring complex calibration.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If precise reference current is generated, then the PLL stability and bandwidth are improved, but the power consumption increases

Engineering Contradiction:
ImprovePLL stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces traditional precision current source circuits (which typically require complex biasing networks, temperature compensation, and high-power consumption) with a switched-capacitor network controlled by frequency-divided signals. This substitution achieves precise reference current generation through capacitive switching rather than resistive biasing, significantly reducing power consumption while maintaining PLL stability and bandwidth performance.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Object-affected harmful factors

If existing solutions are used to reduce supply sensitivity, then the supply noise rejection is improved, but the jitter and design complexity increase

Engineering Contradiction:
Improvesupply noise rejectionVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary approach by using the divided VCO frequency as a mediating control signal for the switched-capacitor network. This intermediary mechanism automatically adjusts the reference current to compensate for supply voltage variations, achieving high supply noise rejection without requiring additional voltage regulation stages or complex noise filtering circuits that would increase jitter and design complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves high supply noise rejection with minimal extra circuits, low jitter, and wide bandwidth while maintaining stability and power efficiency, suitable for System-on-Chip (SoC) clocking applications.

Implementation Method 1

a current reference generator including a switched capacitor circuitry to receive the oscillator output directly or indirectly

Methodology Applied
Scientific EffectSwitched capacitor circuit operation: Capacitance

Data Source

PatentUS10574243B2Apparatus and method for generating stable reference current
Publication Date: 2020.02.25 INTEL CORP
  • US10574243B2 patent drawing
  • US10574243B2 patent drawing
  • US10574243B2 patent drawing

AI summary

An apparatus is provided which comprises: an oscillator to generate a first clock having a first frequency; a divider coupled to the oscillator, wherein the divider is to generate a second clock having a second frequency; and a current reference generator comprising a switched capacitor circuitry which is to receive the second clock directly or indirectly.