Switched Capacitor Slew Boost for Faster ADC Settling
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Solution Overview
Problem
High-speed RF sampling ADCs face challenges with sample and hold periods that are insufficient to resolve the desired number of bits, leading to high current consumption and degradation of noise figure due to the use of buffers or amplifiers, especially at the front end of the ADC.
Innovation Solution
A switched capacitor circuit with first and second current boost circuits that provide current to the second sampling circuit based on the output signal's thresholds, allowing for faster settling accuracy and maintaining linearity performance without increasing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If buffers or amplifiers are used to extend the sample and hold period, then the settling time is improved, but the current consumption increases significantly
Solution Approach 1:
The patent uses periodic switching of the capacitor between the amplifier output and the sampling circuit. The capacitor is charged during the sampling phase and then discharged during the hold phase, creating a periodic action that extends the effective sample and hold period without requiring continuous amplifier operation, thus reducing current consumption while maintaining settling time.
Solution Approach 2:
The capacitor is pre-charged to the desired voltage level during the sampling phase before the hold phase begins. This preliminary action stores the sampled voltage value on the capacitor, allowing the sampling circuit to maintain the sampled value during the hold phase without requiring the amplifier to remain active, thereby extending the sample and hold period while reducing current consumption.
2Measurement precision
If buffers or amplifiers are used to extend the sample and hold period, then the settling accuracy is improved, but the noise figure degrades
Solution Approach 1:
The patent extracts the voltage sampling function from the amplifier and transfers it to a capacitor. The capacitor captures and holds the voltage value without requiring the amplifier to remain active during the hold phase. This separation allows the amplifier to be turned off or operated at lower power during the hold phase, improving settling accuracy while minimizing noise figure degradation associated with continuous amplifier operation.
3Measurement precision
If the sample and hold period is extended to resolve more bits, then the measurement precision is improved, but the device complexity increases
Solution Approach 1:
The patent uses a capacitor to create a copy of the sampled voltage value from the amplifier output. This capacitive copy allows the sampling circuit to maintain the sampled value during the hold phase without requiring the original amplifier to remain active. The capacitor effectively copies and stores the voltage information, enabling extended sample and hold period for higher bit resolution while keeping the circuit complexity low through the use of simple passive components.
Data Source
AI summary
In described examples, a switched capacitor circuit includes an amplifier that generates a first output signal in response to a first sampled input signal. A second sampling circuit is coupled to the amplifier and generates an output signal in response to the first output signal. A first current boost circuit is coupled to the amplifier and the second sampling circuit and provides current to the second sampling circuit when the first output signal is below a first threshold. A second current boost circuit is coupled to the amplifier and the second sampling circuit and receives current from the second sampling circuit when the first output signal is above a second threshold.