Digitally Controlled Switched Capacitor Step-Down Converter
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Solution Overview
Problem
Existing power management solutions for integrated circuits, such as LDOs and off-chip switching regulators, face inefficiencies at low output voltages, leading to reduced battery life and silicon area challenges for fully integrated on-chip switching regulators, while switched capacitor circuits suffer from tone noise and unpredictable ripple in PFM control schemes.
Innovation Solution
A digitally controlled switched capacitor circuit with a segmented capacitor matrix, hysteretic control loop, and digital capacitance modulation, using fixed frequency operation and switching between coarse and fine adjustment modes to regulate output voltage efficiently, and incorporating segmented capacitors to reduce silicon area and tone noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If LDO voltage regulator is used, then output voltage regulation is achieved, but efficiency is low at low output voltages
Solution Approach 1:
The patent replaces the linear analog control mechanism of LDO regulators with a switched-capacitor digital control system. The mechanical analog of continuous FET modulation is substituted with discrete capacitor switching controlled by digital logic, achieving higher efficiency through reduced resistive losses while maintaining voltage regulation through digital feedback control.
Solution Approach 2:
The patent changes the operating parameters from continuous analog control to discrete digital control levels. The voltage regulation is achieved by switching between discrete capacitor configurations rather than continuous FET modulation, enabling efficient operation at low output voltages while maintaining regulation through digital parameter adjustment.
2Loss of energy
If off-chip switching regulator is used, then efficiency is improved, but silicon area is increased
Solution Approach 1:
The patent merges the switching regulator functionality with standard CMOS process capabilities by using switched-capacitor circuits that can be fully integrated on-chip. The external inductors and large capacitors of traditional switching regulators are replaced with on-chip capacitor arrays, combining the efficiency benefits of switching regulation with the area advantages of standard CMOS integration.
Solution Approach 2:
The patent uses segmented capacitor arrays that can be selectively activated to synthesize the required capacitance values. Instead of using large physical capacitors, the system copies the functional effect of large capacitance through parallel switching of multiple smaller capacitor segments, achieving the same electrical behavior with reduced area.
3Loss of energy
If PFM control scheme is used in switched capacitor circuit, then efficiency is improved, but tone noise and unpredictable ripple increase
Solution Approach 1:
The patent implements a digital feedback control system that monitors the output voltage and adjusts the switched-capacitor configuration accordingly. The feedback mechanism uses digital comparators and control logic to maintain stable output voltage, suppressing tone noise and ripple by actively compensating for disturbances rather than relying on passive PFM frequency modulation.
Solution Approach 2:
The patent uses periodic clocked switching of capacitor arrays to transfer charge in controlled intervals. This periodic action, synchronized with digital control, creates predictable switching frequencies that minimize tone noise while maintaining efficiency benefits, replacing the unpredictable frequency modulation of PFM with regular clocked operation.
4Area of stationary object
If segmented capacitor matrix is used, then silicon area is reduced, but circuit complexity increases
Solution Approach 1:
The patent divides the total capacitance into multiple segmented capacitor units that can be independently switched. This segmentation allows the system to achieve variable capacitance values by activating only the necessary segments, reducing the total area required compared to a single large capacitor while using simple binary-weighted switching control to manage complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides high efficiency and reduced silicon area, maintaining output voltage regulation across a wide range of load power demands with predictable tone frequencies, outperforming LDOs and prior switched capacitor circuits in terms of efficiency and noise handling.
Implementation Method 1
A switched capacitor circuit including a transfer capacitor coupled to the load capacitor and selectively coupled to a voltage supply and selectively coupled to the ground reference potential
Data Source
AI summary
A circuit and method for providing a fully integrated DC-DC converter using on-chip switched capacitors is disclosed. A switched capacitor matrix is coupled as a digitally controlled transfer capacitor. A pair of non-overlapping, fixed frequency clock signals is provided to a switched capacitor circuit including the switched capacitor matrix and a load capacitor coupled to the output terminal. A DC input voltage supply is provided. A hysteretic feedback loop is used to control the voltage at the output as a stepped-down voltage from the input by digitally modulating the transfer capacitor using switches in the switch matrix to couple more, or fewer, transfer capacitors to the output terminal during a clock cycle. A coarse and a fine adjustment circuit are provided to improve the regulation during rapid changes in load power. A method of operating the regulator is disclosed.