Switched-Inductor Integrated Voltage Regulator for Fast Transient Response

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Solution Overview

Problem

Current power management systems for microprocessors and systems-on-chip face inefficiencies due to slow voltage transition times and high impedance in power distribution networks, leading to energy wastage and challenges in regulating supply voltage during load transients, particularly in chip multiprocessors and heterogeneous systems-on-chip.

Innovation Solution

A power controller with multiple hardware phases and a comparator-based control scheme that generates feedback voltage from inductor current, allowing for rapid and stable voltage regulation by adjusting duty cycles in response to load transients, using a combination of clock signals and reference voltages to determine the output voltage and reduce decoupling capacitance requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If board-level voltage regulator modules (VRM) are used to deliver supply voltage, then power supply regulation can be achieved, but voltage transition time becomes slow (tens of microseconds) and the system becomes bulky

Engineering Contradiction:
Improvevoltage transition timeVSAvoidregulator module size
Core Design Contradiction:
SpeedVSVolume of moving object

Solution Approach 1:

The patent divides the power regulation function into multiple independent phases (e.g., four-phase interleaved architecture), where each phase operates autonomously with its own switching circuitry and control logic. This segmentation enables faster aggregate voltage transition by distributing the regulation burden across parallel channels, achieving sub-microsecond response times while keeping each phase compact and integrable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from board-level external VRMs to integrated on-chip voltage regulators, moving the power regulation function from the board dimension to the chip dimension. This dimensional shift enables dramatically reduced voltage transition times (to sub-microsecond range) and eliminates the bulky external regulator modules by integrating switching inductors, capacitors, and control logic directly into the processor die.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If high impedance power distribution network is present, then voltage regulation can be maintained, but energy wastage increases due to I2R losses

Engineering Contradiction:
ImproveI2R power lossVSAvoidvoltage regulation stability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent implements closed-loop feedback control in each phase with voltage sensing and duty cycle adjustment to maintain stable output voltage. The feedback mechanism compensates for voltage drops across the PDN by dynamically adjusting the switching duty cycle, ensuring that the output voltage remains regulated despite the presence of PDN impedance and I2R losses in the power distribution network.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent anticipates load transients by using feedforward control mechanisms that detect load changes before they cause significant voltage drops. The multi-phase interleaved architecture proactively balances current distribution across phases to prevent excessive I2R losses, and the control circuitry pre-adjusts duty cycles in response to predicted load demands, reducing energy wastage before it occurs.

Inventive Principle:
Principle #10Preliminary action

3Loss of energy

If load-line control is implemented to suppress voltage overshoot, then voltage regulation during transients improves, but energy efficiency deteriorates due to excessive voltage delivery

Engineering Contradiction:
Improveload-line power wasteVSAvoidvoltage overshoot suppression
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent implements dynamic load-line control where the effective load-line resistance is adjusted in real-time based on actual load conditions. During light loading, the control circuitry reduces the effective RLL by modifying duty cycle waveforms and switching timing, thereby minimizing unnecessary voltage delivery and reducing power waste. During heavy loading or transients, the load-line control is strengthened to maintain voltage regulation and suppress overshoot, achieving both efficiency and reliability across varying operating conditions.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables high-bandwidth voltage regulation with predictable small-signal response and rapid large-load transient handling, reducing energy wastage and improving scalability and efficiency by minimizing the need for excessive decoupling capacitance and package-level components.

Implementation Method 1

integrated magnetic-core power inductors can be relatively highly scalable and capable of delivering current densities up to 8 A/mm2 or more

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 2

energy can be stored on or close to the integrated circuit in capacitors (switched-capacitor converters)

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9843262B2Systems and methods for switched-inductor integrated voltage regulators
Publication Date: 2017.12.12 THE TRUSTEES OF COLUMBIA UNIV IN THE CITY OF NEW YORK
  • US9843262B2 patent drawing
  • US9843262B2 patent drawing
  • US9843262B2 patent drawing

AI summary

Power controller includes an output terminal having an output voltage, at least one clock generator to generate a plurality of clock signals and a plurality of hardware phases. Each hardware phase is coupled to the at least one clock generator and the output terminal and includes a comparator. Each hardware phase is configured to receive a corresponding one of the plurality of clock signals and a reference voltage, combine the corresponding clock signal and the reference voltage to produce a reference input, generate a feedback voltage based on the output voltage, compare the reference input and the feedback voltage using the comparator and provide a comparator output to the output terminal, whereby the comparator output determines a duty cycle of the power controller. An integrated circuit including the power controller is also provided.