Switched-Supply RFDAC Architecture for Low-Power Efficiency
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Solution Overview
Problem
Existing Radio Frequency (RF) Digital-to-Analog Converters (DACs) in wireless communication systems, particularly in 5G and new radio technologies, face inefficiencies in power consumption and output power due to poor performance at lower output powers, leading to significant power dissipation and reduced efficiency.
Innovation Solution
The implementation of a switched-mode technique for RF DACs, utilizing a class E DAC design with an array of switches and a switched-capacitor charge pump, which adjusts the number of operating switches based on amplitude and employs a switched supply similar to power amplifiers, to optimize efficiency and output power across various power ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional RF DAC design is used, then simplicity of structure is maintained, but efficiency deteriorates at lower output powers
Solution Approach 1:
The RF DAC is divided into multiple DAC stages, each associated with a specific voltage level. Each stage can be independently controlled and optimized for its voltage range, allowing the system to achieve high efficiency across different output power levels by selecting the appropriate stage for the current operating condition.
Solution Approach 2:
The system dynamically selects which DAC stage to use based on the amplitude of the input signal. This dynamic adaptation allows the RF DAC to operate at peak efficiency regardless of whether the output power is high or low, as the appropriate stage is always selected to match the current operating conditions.
2Use of energy by moving object
If fixed voltage supply is used, then power consumption is constant, but efficiency deteriorates across varying output power ranges
Solution Approach 1:
The system changes the voltage supply parameter dynamically based on the output power requirements. Each DAC stage is associated with a specific voltage level, and the system selects the appropriate voltage stage to match the current output power demand, thereby maintaining high efficiency across the entire power range from low to high output powers.
3Use of energy by moving object
If array of switches with amplitude-based selection is implemented, then efficiency at lower output powers is improved, but device complexity increases
Solution Approach 1:
The switch array is segmented into multiple groups, with each group associated with a specific voltage level and amplitude range. This segmentation allows the system to activate only the necessary switches for the current operating conditions, reducing unnecessary power consumption while maintaining the ability to handle various amplitude levels efficiently.
Data Source
AI summary
High efficiency amplitude DACs (Digital-to-Analog Converters) and RFDACs (Radio Frequency DACs) employing such amplitude DACs are discussed. One exemplary embodiment is a DAC comprising a plurality of DAC stages, wherein each DAC stage of the plurality of DAC stages is associated with a respective predetermined voltage of a plurality of predetermined voltages, wherein each DAC stage of the plurality of DAC stages can receive a digital signal at the respective predetermined voltage associated with that DAC stage when the respective predetermined voltage of that DAC stage is a selected predetermined voltage, wherein the selected predetermined voltage is based on an amplitude of the digital signal, and wherein each DAC stage of the plurality of DAC stages can generate a respective analog signal associated with that DAC stage based on the digital signal received at that DAC stage when the respective predetermined voltage of that DAC stage is the selected predetermined voltage.