Switching Chip Forwarding Layout for Low-Latency HPC Data Paths

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Solution Overview

Problem

Integrating Linear Pluggable Optical (LPO) modules into High Performance Computing (HPC) core switch systems faces challenges such as data congestion, increased latency, and data loss due to excessive data flow and inefficient data transmission paths.

Innovation Solution

A switching device with a data switching chip and control unit that connects each forwarding unit to both uplink and downlink ports, optimizing PCB wiring to reduce data congestion and transmission path lengths, and dynamically reallocating data transmission based on volume thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If traditional pluggable optical modules with DSP are used in HPC core switch systems, then data transmission capability is maintained, but power consumption is high and latency is increased

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transmission reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent extracts and removes the DSP component from the optical module, creating an LPO module that eliminates the power-consuming digital signal processing unit while maintaining basic optical transmission functionality. This extraction directly reduces power consumption while the removed DSP component is the source of the contradiction.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If data switching chip connects all forwarding units to all ports, then data transmission flexibility is improved, but data congestion and latency increase due to excessive data flow

Engineering Contradiction:
Improvedata transmission flexibilityVSAvoiddata latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments the data switching chip into multiple forwarding units, each responsible for specific port connections. This segmentation divides the data flow into separate channels, preventing congestion while maintaining flexible routing capabilities through coordinated forwarding units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent assigns different connection configurations to different forwarding units based on local requirements. Each forwarding unit is optimized for its specific port combinations, creating localized data transmission paths that reduce overall system latency while maintaining flexibility.

Inventive Principle:
Principle #3Local quality

3Use of energy by moving object

If LPO modules are integrated into HPC core switch systems, then power consumption is reduced, but data congestion and data loss occur due to inefficient data transmission paths

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transmission reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements dynamic data transmission path selection where the system can adaptively choose different forwarding routes based on current network conditions. This dynamic adjustment optimizes data flow through the LPO modules, preventing congestion and data loss while maintaining the power efficiency benefits of LPO technology.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12476925B2Data forwarding
Publication Date: 2025.11.18 BEIJING ZITIAO NETWORK TECH CO LTD
  • US12476925B2 patent drawing
  • US12476925B2 patent drawing
  • US12476925B2 patent drawing

AI summary

Embodiments of the disclosure provide a device, method, apparatus and computer readable storage medium for forwarding data. A switching device includes: one or more sets of uplink ports, configured to be coupled with a first external interface to transmit data with an upstream device via the first external interface; one or more sets of downlink ports, configured to be coupled with a second external interface to transmit data with a downstream device via the second external interface; a data switching chip, comprising a plurality of forwarding units, each forwarding unit of the plurality of forwarding units adapted to be connected to at least one set of uplink ports of the one or more sets of uplink ports and at least one set of downlink ports of the one or more sets of downlink ports; and a control unit configured to control data forwarding of the data switching chip.