Switching Circuit Intermediate State for Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing digital circuitry, particularly in battery-powered wireless communication devices, faces challenges in minimizing power consumption during transitions between conducting and non-conducting states in complementary pairs of transistors, leading to increased power consumption and noise.
Innovation Solution
A switching circuit design that includes a first switch element and a second switch element, with a controller managing their states to ensure an intermediate period where both are non-conducting, reducing current flow and enhancing switching speed by charging parasitic capacitance, thereby minimizing power consumption and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a complementary pair of transistors is used for switching, then power consumption is reduced in steady states, but power consumption increases during transitions when both transistors are momentarily conducting
Solution Approach 1:
The controller switches the second transistor off before switching the first transistor on, creating a preparatory intermediate state where both transistors are non-conducting. This preliminary action prevents the harmful overlap where both transistors would be conducting simultaneously, thereby eliminating the power consumption spike during transitions.
Solution Approach 2:
The switching circuit operates through periodic cycles with distinct phases: first transistor on/second off, both off (intermediate state), and second transistor on/first off. This periodic action with controlled timing ensures that the harmful conducting state of both transistors never occurs, while maintaining the desired switching functionality.
2Productivity
If switching speed is increased to improve performance, then productivity increases, but noise increases due to faster charge/discharge of parasitic capacitance
Solution Approach 1:
The patent converts the harmful effect of parasitic capacitance charge/discharge noise into a beneficial timing mechanism. By deliberately designing the intermediate state duration to match the RC time constant of the parasitic capacitance, the natural discharge process is harnessed to ensure clean switching transitions without excessive noise, transforming what was previously a harmful factor into a useful timing reference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption and noise in digital circuitry by eliminating current flow during transitions and increasing switching speed, making it suitable for high-frequency wireless communication devices.
Implementation Method 1
increasing the rate of charge of the parasitic capacitance and reducing noise
Data Source
AI summary
A switching circuit that switches voltage at an output node includes a first switch element configured to enable supplying a first voltage from a first supply node to the output node, a second switch element configured to enable supplying a second voltage from a second supply node to the output node, and a controller. The controller switches the first and the second switch element between a first state and a second state depending on an input voltage. In the first state, the first switch element is in a conducting state and the second switch element is in a non-conducting state, and, in the second state the first switch element is in a non-conducting state and the second switch element is in a conducting state, the switching being performed through an intermediate state in which both the first and the second switch element are in the non-conducting state.