Switching Circuit Maintaining Constant On-Resistance
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Solution Overview
Problem
Existing switching circuits, such as NMOS, PMOS, and CMOS switches, experience significant variations in on-resistance (Ron), leading to signal distortion as the signal voltage approaches the maximum or minimum available voltage, causing the output to become clamped and fail to follow the input.
Innovation Solution
A switching circuit is designed with an NMOS transistor coupled in series with a sense resistor, utilizing a resistor divider and an operational amplifier to maintain a constant on-resistance by adjusting the gate voltage of the NMOS transistor, ensuring the drain-source resistance equals the sense resistor's resistance, thereby maintaining a consistent total resistance throughout the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate of NMOS switches is biased to the highest available voltage (VDD) to minimize Ron variations, then the on-resistance variation is reduced, but the on-resistance becomes excessively high when the signal voltage approaches VDD, causing signal clamping and distortion
Solution Approach 1:
The patent employs a feedback mechanism where a sensor detects the actual on-resistance of the switch and provides a sense signal to a driver circuit. The driver circuit adjusts the gate voltage dynamically based on this feedback to maintain constant on-resistance across the entire signal voltage range, preventing both excessive resistance variation and signal clamping
Solution Approach 2:
The invention transitions from a static gate biasing approach to a dynamic control system. The gate voltage is no longer fixed at VDD or ground but is continuously adjusted by the driver circuit in response to the sensor feedback, allowing the switch to adapt its characteristics to maintain optimal performance across varying signal conditions
2Reliability
If the gate of PMOS switches is biased to the lowest available voltage (ground) to minimize Ron variations, then the on-resistance variation is reduced, but the on-resistance becomes excessively high when the signal voltage approaches ground, causing signal clamping and distortion
Solution Approach 1:
The sensor detects the actual on-resistance of the PMOS switch and provides feedback to the driver circuit, which dynamically adjusts the gate voltage to maintain constant on-resistance. This feedback control prevents the on-resistance from becoming excessively high near ground potential, eliminating signal clamping and distortion
Solution Approach 2:
The gate biasing transitions from a static ground reference to a dynamic control voltage that is continuously adjusted by the driver circuit based on real-time on-resistance measurements, enabling the PMOS switch to maintain optimal performance across the full signal range
3Reliability
If a CMOS switch is used to combine NMOS and PMOS characteristics, then the on-resistance characteristic is improved compared to individual NMOS or PMOS, but significant Ron variation remains, resulting in signal distortion
Solution Approach 1:
The patent applies feedback control to the CMOS switch configuration, where the sensor monitors the combined on-resistance of the parallel NMOS and PMOS transistors and the driver circuit adjusts the gate voltages of both transistors to maintain constant total on-resistance, eliminating the significant variations that remain in conventional CMOS switches
Solution Approach 2:
The driver circuit is designed to control both the NMOS and PMOS transistor gates, providing multi-functional control that coordinates the operation of both transistors to achieve constant on-resistance, thereby enhancing the universal applicability and performance of the CMOS switch configuration
Data Source
AI summary
The application provides a switching circuit for switchably connecting an input node and an output node. The switching circuit comprises a switch operable to switchably connect the input node to the output node in response to a switching signal. A sensor is provided for sensing the voltage between the input and output nodes and providing a sense signal in response thereto. A driver coupled to the sensor adjusts the switching signal in response to the sense signal.